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65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
/*
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* Copyright (C) 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_sam3x8e
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
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*/
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#ifndef PERIPH_CPU_H_
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#define PERIPH_CPU_H_
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#include "cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief declare needed generic SPI functions
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* @{
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*/
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTES
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#define PERIPH_SPI_NEEDS_TRANSFER_REG
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS
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/** @} */
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/**
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* @brief GPIO mux configuration
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*/
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typedef enum {
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GPIO_MUX_A = 0, /**< alternate function A */
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GPIO_MUX_B = 1, /**< alternate function B */
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} gpio_mux_t;
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/**
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* @brief UART configuration data
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*/
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typedef struct {
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Uart *dev; /**< U(S)ART device used */
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Pio *rx_port; /**< port for RX pin */
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Pio *tx_port; /**< port for TX pin */
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uint8_t rx_pin; /**< RX pin */
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uint8_t tx_pin; /**< TX pin */
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gpio_mux_t mux; /**< MUX used for pins */
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uint8_t pmc_id; /**< bit in the PMC register of the device*/
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uint8_t irqn; /**< interrupt number of the device */
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} uart_conf_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H_ */
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/** @} */
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