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5f78519b29
The QN9080DK board can expose the I2C bus SDA and SCL in the pins labeled D14 and D15 respectively in the J5 headers, and in the Pmod (J8) connector in the pins 10 and 9 of the header respectively. The bus has a 2K2 pull up resistor on each line when SB7 and SB8 (next to the Pmod connector) are closed, which is the factory default.
84 lines
1.4 KiB
C
84 lines
1.4 KiB
C
/*
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* Copyright (C) 2020 iosabi
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_qn9080dk
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* @{
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*
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* @file
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* @brief Configuration of CPU peripherals for QN9080DK base board board
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*
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* @author iosabi <iosabi@protonmail.com>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include <stdint.h>
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#include "cpu.h"
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name I2C configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = I2C1,
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.pin_scl = GPIO_PIN(PORT_A, 6),
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.pin_sda = GPIO_PIN(PORT_A, 7),
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.speed = I2C_SPEED_FAST,
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},
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};
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#define I2C_NUMOF ARRAY_SIZE(i2c_config)
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART0,
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.rx_pin = GPIO_PIN(PORT_A, 17),
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.tx_pin = GPIO_PIN(PORT_A, 16),
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},
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};
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name Timer configuration
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* @{
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*/
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#define TIMER_NUMOF 4
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/** @} */
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/* put here the board peripherals definitions:
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- Available clocks
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- PWMs
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- SPIs
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- ADC
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- RTC
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- RTT
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etc
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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