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5f78519b29
The QN9080DK board can expose the I2C bus SDA and SCL in the pins labeled D14 and D15 respectively in the J5 headers, and in the Pmod (J8) connector in the pins 10 and 9 of the header respectively. The bus has a 2K2 pull up resistor on each line when SB7 and SB8 (next to the Pmod connector) are closed, which is the factory default.
82 lines
1.6 KiB
C
82 lines
1.6 KiB
C
/*
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* Copyright (C) 2020 iosabi
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_qn9080dk
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* @{
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*
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* @file
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* @brief Board specific definitions for the QN9080DK base board
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*
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* @author iosabi <iosabi@protonmail.com>
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*/
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#ifndef BOARD_H
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#define BOARD_H
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#include "cpu.h"
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#include "periph_conf.h"
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock configuration
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* @{
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*/
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#ifndef CLOCK_CORECLOCK
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/* Using 32MHz internal oscillator as default clock source */
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#define CLOCK_CORECLOCK (32000000ul)
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#endif
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/** @} */
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/**
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* @name LED configuration
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* @{
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*/
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#define LED_RED_PIN GPIO_PIN(PORT_A, 31)
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#define LED_GREEN_PIN GPIO_PIN(PORT_A, 25)
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#define LED_BLUE_PIN GPIO_PIN(PORT_A, 13)
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/** @} */
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/**
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* @name User buttons
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* @{
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*/
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#define BTN1_PIN GPIO_PIN(PORT_A, 24)
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#define BTN1_MODE GPIO_IN_PU
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#define BTN2_PIN GPIO_PIN(PORT_A, 19)
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#define BTN2_MODE GPIO_IN_PU
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/** @} */
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/**
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* @name MMA8652FC 3-axis accelerometer bus configuration
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*
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* The MMA8652FC in the QN9080DK is only available when JP11 is shorted (the
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* factory default).
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* @{
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*/
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#define MMA8X5X_PARAM_I2C I2C_DEV(0)
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#define MMA8X5X_PARAM_ADDR 0x1D
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#define MMA8X5X_PARAM_TYPE (MMA8X5X_TYPE_MMA8652)
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/** @} */
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/**
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* @brief Initialize board specific hardware
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*/
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void board_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* BOARD_H */
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/** @} */
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