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139 lines
3.1 KiB
C
139 lines
3.1 KiB
C
/*
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* Copyright (C) 2016 Fundacion Inria Chile
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_stm32l1
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* @ingroup drivers_periph_adc
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* @{
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*
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* @file
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* @brief Low-level ADC driver implementation
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*
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* @author Francisco Molina <francisco.molina@inria.cl>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
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*
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* @}
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*/
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#include "cpu.h"
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#include "mutex.h"
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#include "periph/adc.h"
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#ifdef ADC_CONFIG
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/**
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* @brief Maximum allowed ADC clock speed
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*/
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#define MAX_ADC_SPEED (12000000U)
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/**
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* @brief Load the ADC configuration
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*/
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static const adc_conf_t adc_config[] = ADC_CONFIG;
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/**
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* @brief Allocate locks for all three available ADC device
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*
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* All STM32l1 CPU's have single ADC device
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*/
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static mutex_t lock = MUTEX_INIT;
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static inline void prep(void)
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{
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mutex_lock(&lock);
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RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
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}
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static inline void done(void)
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{
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RCC->APB2ENR &= ~(RCC_APB2ENR_ADC1EN);
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mutex_unlock(&lock);
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}
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int adc_init(adc_t line)
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{
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uint32_t clk_div = 2;
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/* check if the line is valid */
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if (line >= ADC_NUMOF) {
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return -1;
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}
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/* lock and power-on the device */
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prep();
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/* configure the pin */
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if ((adc_config[line].pin != GPIO_UNDEF))
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gpio_init_analog(adc_config[line].pin);
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/* set clock prescaler to get the maximal possible ADC clock value */
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for (clk_div = 2; clk_div < 8; clk_div += 2) {
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if ((CLOCK_CORECLOCK / clk_div) <= MAX_ADC_SPEED) {
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break;
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}
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}
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ADC->CCR = ((clk_div / 2) - 1) << 16;
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/* check if this channel is an internal ADC channel, if so
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* enable the internal temperature and Vref */
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if (adc_config[line].chan == 16 || adc_config[line].chan == 17) {
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ADC->CCR |= ADC_CCR_TSVREFE;
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}
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/* enable the ADC module */
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ADC1->CR2 = ADC_CR2_ADON;
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/* turn off during idle phase*/
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ADC1->CR1 = ADC_CR1_PDI;
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/* free the device again */
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done();
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return 0;
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}
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int adc_sample(adc_t line, adc_res_t res)
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{
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int sample;
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/* check if resolution is applicable */
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if ( (res != ADC_RES_6BIT) &&
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(res != ADC_RES_8BIT) &&
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(res != ADC_RES_10BIT) &&
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(res != ADC_RES_12BIT)) {
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return -1;
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}
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/* lock and power on the ADC device */
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prep();
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/* set resolution, conversion channel and single read */
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ADC1->CR1 |= res & ADC_CR1_RES;
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ADC1->SQR1 &= ~ADC_SQR1_L;
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ADC1->SQR5 = adc_config[line].chan;
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/* wait for regulat channel to be ready*/
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while (!(ADC1->SR & ADC_SR_RCNR)) {}
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/* start conversion and wait for results */
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ADC1->CR2 |= ADC_CR2_SWSTART;
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while (!(ADC1->SR & ADC_SR_EOC)) {}
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/* finally read sample and reset the STRT bit in the status register */
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sample = (int)ADC1->DR;
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ADC1 -> SR &= ~ADC_SR_STRT;
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/* power off and unlock device again */
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done();
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return sample;
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}
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#else
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typedef int dont_be_pedantic;
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#endif /* ADC_CONFIG */
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