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c74ec1c253
cpu/mips32r2_common adds base architecture support for mips32r2 cores it can be built in it own right as a 'CPU', but is dependant on a bootloader (like u-boot) to have bootstrapped the system, this has been tested on a 'malta' FPGA system (BOARD=mips-malta) with various mips32r2 compliant cores (interAptiv, P5600, etc).
43 lines
863 B
C
43 lines
863 B
C
/*
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* Copyright 2016, Imagination Technologies Limited and/or its
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* affiliated group companies.
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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#include <mips/m32c0.h>
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#include "arch/irq_arch.h"
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unsigned int irq_arch_enable(void)
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{
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unsigned int status;
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__asm__ volatile ("ei %0" : "=r" (status));
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return status;
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}
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unsigned int irq_arch_disable(void)
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{
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unsigned int status;
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__asm__ volatile ("di %0" : "=r" (status));
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return status;
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}
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void irq_arch_restore(unsigned int state)
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{
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if (state & SR_IE) {
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mips32_bs_c0(C0_STATUS, SR_IE);
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}
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else {
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mips32_bc_c0(C0_STATUS, SR_IE);
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}
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}
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int irq_arch_in(void)
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{
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return (mips32_get_c0(C0_STATUS) & SR_EXL) != 0;
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}
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