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RIOT/cpu/stm32_common/Makefile.include
2018-06-19 14:31:23 +02:00

48 lines
1.5 KiB
Makefile

# export the CPU family so we can differentiate between them in the code
FAM = $(shell echo $(CPU_FAM) | tr 'a-z-' 'A-Z_')
export CFLAGS += -DCPU_FAM_$(FAM)
# include common periph module
USEMODULE += periph_common
# include stm32 common functions and stm32 common periph drivers
USEMODULE += stm32_common stm32_common_periph
# flashpage and eeprom periph implementations share flash lock/unlock functions
# in periph_flash_common
ifneq (,$(filter periph_flashpage periph_eeprom,$(FEATURES_REQUIRED)))
FEATURES_REQUIRED += periph_flash_common
endif
# For stm32 cpu's we use the stm32_common.ld linker script
export LINKFLAGS += -L$(RIOTCPU)/stm32_common/ldscripts
LINKER_SCRIPT ?= stm32_common.ld
# export the common include directory
export INCLUDES += -I$(RIOTCPU)/stm32_common/include
# Compute ROM_LEN and RAM_LEN
include $(RIOTCPU)/stm32_common/stm32_mem_lengths.mk
KB := 1024
LEN := $(shell echo $(ROM_LEN) | sed 's/K//')
FLASHSIZE := $(shell echo $$(( $(LEN) * $(KB) )) )
# Get CPU_LINE_ variable
-include $(RIOTCPU)/$(CPU)/stm32_line.mk
CPU_LINE ?= $(shell echo $(CPU_MODEL) | cut -c -9 | tr 'a-z-' 'A-Z_')xx
# Set CFLAGS
export CFLAGS += -D$(CPU_LINE) -DCPU_LINE_$(CPU_LINE)
export CFLAGS += -DSTM32_FLASHSIZE=$(FLASHSIZE)U
info-stm32:
@$(COLOR_ECHO) "CPU: $(CPU_MODEL)"
@$(COLOR_ECHO) "\tLine: $(CPU_LINE)"
@$(COLOR_ECHO) "\tPin count:\t$(STM32_PINCOUNT)"
@$(COLOR_ECHO) "\tROM size:\t$(ROM_LEN) ($(FLASHSIZE) Bytes)"
@$(COLOR_ECHO) "\tRAM size:\t$(RAM_LEN)"
ifneq (,$(CCMRAM_LEN))
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ccmram_length=$(CCMRAM_LEN)
endif