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86 lines
3.0 KiB
C
86 lines
3.0 KiB
C
/*
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* Copyright (C) 2014 Loci Controls Inc.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @addtogroup cpu_cc2538
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* @{
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*
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* @file
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* @brief CC2538 SSI interface
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*
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* @author Ian Martin <ian@locicontrols.com>
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*/
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#ifndef CC2538_SSI_H
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#define CC2538_SSI_H
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#include "cc2538.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief SSI component registers
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*/
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typedef struct {
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union {
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cc2538_reg_t CR0; /**< SSI Control Register 0 */
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struct {
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cc2538_reg_t DSS : 4; /**< SSI data size select */
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cc2538_reg_t FRF : 2; /**< SSI frame format select */
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cc2538_reg_t SPO : 1; /**< SSI serial clock polarity */
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cc2538_reg_t SPH : 1; /**< SSI serial clock phase */
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cc2538_reg_t SCR : 8; /**< SSI serial clock rate */
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cc2538_reg_t RESERVED : 16; /**< Reserved bits */
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} CR0bits;
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};
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union {
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cc2538_reg_t CR1; /**< SSI Control Register 1 */
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struct {
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cc2538_reg_t LBM : 1; /**< SSI loop-back mode */
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cc2538_reg_t SSE : 1; /**< SSI synchronous serial port enable */
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cc2538_reg_t MS : 1; /**< SSI master and slave select */
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cc2538_reg_t SOD : 1; /**< SSI slave mode output disable */
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cc2538_reg_t RESERVED : 28; /**< Reserved bits */
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} CR1bits;
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};
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cc2538_reg_t DR; /**< SSI Data register */
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union {
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cc2538_reg_t SR; /**< SSI FIFO/busy Status Register */
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struct {
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cc2538_reg_t TFE : 1; /**< SSI transmit FIFO empty */
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cc2538_reg_t TNF : 1; /**< SSI transmit FIFO not full */
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cc2538_reg_t RNE : 1; /**< SSI receive FIFO not empty */
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cc2538_reg_t RFF : 1; /**< SSI receive FIFO full */
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cc2538_reg_t BSY : 1; /**< SSI busy bit */
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cc2538_reg_t RESERVED : 27; /**< Reserved bits */
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} SRbits;
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};
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cc2538_reg_t CPSR; /**< SSI Clock Register */
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cc2538_reg_t IM; /**< SSI Interrupt Mask register */
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cc2538_reg_t RIS; /**< SSI Raw Interrupt Status register */
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cc2538_reg_t MIS; /**< SSI Masked Interrupt Status register */
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cc2538_reg_t ICR; /**< SSI Interrupt Clear Register */
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cc2538_reg_t DMACTL; /**< SSI uDMA Control Register. */
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cc2538_reg_t CC; /**< SSI clock configuration */
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} cc2538_ssi_t;
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#define SSI0 ( (cc2538_ssi_t*)0x40008000 ) /**< SSI0 Instance */
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#define SSI1 ( (cc2538_ssi_t*)0x40009000 ) /**< SSI1 Instance */
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#ifdef __cplusplus
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} /* end extern "C" */
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#endif
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#endif /* CC2538_SSI_H */
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/** @} */
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