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45b353c6ef
The MSP430 vendor files already provide macros containing register constants and symbols (provided via linker scripts) containing addresses of peripheral registers. So lets make use of that rather than maintaining a long list of constants.
114 lines
3.2 KiB
C
114 lines
3.2 KiB
C
/*
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* Copyright (C) 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_msp430_x1xx
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* @{
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*
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* @file
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* @brief Cortex CMSIS style definition of MSP430 registers
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*
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* @todo This file is incomplete, not all registers are listed. Further
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* There are probably some inconsistencies throughout the MSP430
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* family which need to be addressed.
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef X1XX_MSP430_REGS_H
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#define X1XX_MSP430_REGS_H
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#include <stdint.h>
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#include "msp430_regs_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief USART (UART, SPI and I2C) Registers
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*/
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typedef struct {
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REG8 CTL; /**< USART control */
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REG8 TCTL; /**< transmit control */
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REG8 RCTL; /**< receive control */
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REG8 MCTL; /**< modulation control */
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REG8 BR0; /**< baud rate control 0 */
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REG8 BR1; /**< baud rate control 1 */
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REG8 RXBUF; /**< receive buffer */
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REG8 TXBUF; /**< transmit buffer */
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} msp_usart_t;
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/**
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* @brief USART Special Function Registers (SFR)
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*
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* Despite being part of the USART peripheral, the SFR registers location is
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* completely different. Even more confusing, the IE register of USART 1
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* follows the IE register of USART 0. Hence, the SFR register map of the two
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* USART peripherals will overlap (with the IE register of the second USART
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* being located at the first padding of the first USART). The padding bytes
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* are intentionally declared as `const` to aid in preventing accidentally
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* overwriting registers of the other USART's SFR registers.
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*/
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typedef struct {
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REG8 IE; /**< USART Interrupt Enable Register */
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const uint8_t _pad1;/**< Padding */
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REG8 IFG; /**< USART Interrupt Flag Register */
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const uint8_t _pad2;/**< Padding */
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REG8 ME; /**< Module Enable Register */
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} msp_usart_sfr_t;
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/**
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* @name USART clock selection
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*
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* The vendor header files expose clock configurations selection field as one
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* bitmask per bit. This is pretty hard to read in the code, so we provide
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* alias with better names.
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*
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* @{
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*/
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#define UXTCTL_SSEL_UCLKI 0 /**< Clock USART using UCLKI clock */
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#define UXTCTL_SSEL_ACLK SSEL0 /**< Clock USART using auxiliary clock */
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#define UXTCTL_SSEL_SMCLK SSEL1 /**< Clock USART using sub-system master clock */
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#define UXTCTL_SSEL_MASK (SSEL0 | SSEL1) /**< Mask to retrieve SSEL field */
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/** @} */
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/**
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* @name Typing of base register objects
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* @{
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*/
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/**
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* @brief USART 0 SFR register map
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*/
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extern msp_usart_sfr_t USART_0_SFR;
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/**
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* @brief USART 1 SFR register map
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*/
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extern msp_usart_sfr_t USART_1_SFR;
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/**
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* @brief USART 0 register map
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*
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* @details The address is provided by the linker script
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*/
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extern msp_usart_t USART_0;
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/**
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* @brief USART 1 register map
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*
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* @details The address is provided by the linker script
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*/
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extern msp_usart_t USART_1;
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* X1XX_MSP430_REGS_H */
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/** @} */
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