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https://github.com/RIOT-OS/RIOT.git
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177 lines
4.9 KiB
C
177 lines
4.9 KiB
C
/*
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* Copyright (C) 2014-2016 Freie Universität Berlin
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* 2015 Jan Wagner <mail@jwagner.eu>
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*
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_nrf5x_common
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* @{
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*
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* @file
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* @brief Implementation of the peripheral UART interface
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*
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* @author Christian Kühling <kuehling@zedat.fu-berlin.de>
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* @author Timo Ziegler <timo.ziegler@fu-berlin.de>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Jan Wagner <mail@jwagner.eu>
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*
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* @}
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*/
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#include <stdint.h>
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#include "cpu.h"
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#include "sched.h"
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#include "thread.h"
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#include "periph/uart.h"
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#include "periph_cpu.h"
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#include "periph_conf.h"
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/**
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* @brief Allocate memory for the interrupt context
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*/
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static uart_isr_ctx_t uart_config;
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int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
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{
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if (uart != 0) {
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return -1;
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}
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/* remember callback addresses and argument */
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uart_config.rx_cb = rx_cb;
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uart_config.arg = arg;
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#ifdef CPU_FAM_NRF51
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/* power on the UART device */
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NRF_UART0->POWER = 1;
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#endif
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/* reset configuration registers */
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NRF_UART0->CONFIG = 0;
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/* configure RX/TX pin modes */
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GPIO_BASE->DIRSET = (1 << UART_PIN_TX);
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GPIO_BASE->DIRCLR = (1 << UART_PIN_RX);
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/* configure UART pins to use */
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NRF_UART0->PSELTXD = UART_PIN_TX;
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NRF_UART0->PSELRXD = UART_PIN_RX;
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/* enable HW-flow control if defined */
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#if UART_HWFLOWCTRL
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/* set pin mode for RTS and CTS pins */
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GPIO_BASE->DIRSET = (1 << UART_PIN_RTS);
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GPIO_BASE->DIRCLR = (1 << UART_PIN_CTS);
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/* configure RTS and CTS pins to use */
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NRF_UART0->PSELRTS = UART_PIN_RTS;
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NRF_UART0->PSELCTS = UART_PIN_CTS;
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NRF_UART0->CONFIG |= UART_CONFIG_HWFC_Msk; /* enable HW flow control */
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#else
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NRF_UART0->PSELRTS = 0xffffffff; /* pin disconnected */
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NRF_UART0->PSELCTS = 0xffffffff; /* pin disconnected */
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#endif
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/* select baudrate */
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switch (baudrate) {
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case 1200:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1200;
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break;
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case 2400:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud2400;
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break;
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case 4800:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud4800;
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break;
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case 9600:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud9600;
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break;
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case 14400:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud14400;
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break;
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case 19200:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud19200;
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break;
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case 28800:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud28800;
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break;
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case 38400:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud38400;
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break;
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case 57600:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud57600;
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break;
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case 76800:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud76800;
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break;
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case 115200:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud115200;
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break;
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case 230400:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud230400;
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break;
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case 250000:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud250000;
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break;
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case 460800:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud460800;
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break;
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case 921600:
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NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud921600;
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break;
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default:
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return -2;
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}
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/* enable the UART device */
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NRF_UART0->ENABLE = UART_ENABLE_ENABLE_Enabled;
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/* enable TX and RX */
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NRF_UART0->TASKS_STARTTX = 1;
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NRF_UART0->TASKS_STARTRX = 1;
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/* enable global and receiving interrupt */
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NVIC_EnableIRQ(UART_IRQN);
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NRF_UART0->INTENSET = UART_INTENSET_RXDRDY_Msk;
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return 0;
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}
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void uart_write(uart_t uart, const uint8_t *data, size_t len)
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{
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if (uart == 0) {
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for (size_t i = 0; i < len; i++) {
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/* write data into transmit register */
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NRF_UART0->TXD = data[i];
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/* wait for any transmission to be done */
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while (NRF_UART0->EVENTS_TXDRDY == 0);
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/* reset ready flag */
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NRF_UART0->EVENTS_TXDRDY = 0;
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}
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}
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}
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void uart_poweron(uart_t uart)
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{
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(void)uart;
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NRF_UART0->TASKS_STARTRX = 1;
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NRF_UART0->TASKS_STARTTX = 1;
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}
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void uart_poweroff(uart_t uart)
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{
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(void)uart;
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NRF_UART0->TASKS_SUSPEND;
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}
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void isr_uart0(void)
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{
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if (NRF_UART0->EVENTS_RXDRDY == 1) {
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NRF_UART0->EVENTS_RXDRDY = 0;
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char byte = (char)(NRF_UART0->RXD & 0xff);
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uart_config.rx_cb(uart_config.arg, byte);
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}
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if (sched_context_switch_request) {
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thread_yield();
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}
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}
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