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https://github.com/RIOT-OS/RIOT.git
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940097336a
- moved definition of CPUID_LEN to periph_cpu.h - fixed some doxygen - simplyfied some implementations
125 lines
2.9 KiB
C
125 lines
2.9 KiB
C
/*
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* Copyright (C) 2015 Freie Universität Berlin
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* 2015 Hamburg University of Applied Sciences
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_sam3x8e
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
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* @author Tobias Fredersdorf <tobias.fredersdorf@haw-hamburg.de>
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*
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include "cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Overwrite the default gpio_t type definition
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*/
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#define HAVE_GPIO_T
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typedef uint32_t gpio_t;
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/** @} */
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/**
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* @brief Definition of a fitting UNDEF value
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*/
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#define GPIO_UNDEF (0xffffffff)
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/**
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* @brief Define a CPU specific GPIO pin generator macro
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*/
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#define GPIO_PIN(x, y) (((uint32_t)PIOA + (x << 9)) | y)
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/**
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* @brief Declare needed generic SPI functions
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* @{
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*/
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTES
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#define PERIPH_SPI_NEEDS_TRANSFER_REG
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS
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/** @} */
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/**
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* @brief Length of the CPU_ID in octets
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*/
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#define CPUID_LEN (16U)
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/**
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* @brief Override values for pull register configuration
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* @{
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*/
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#define HAVE_GPIO_PP_T
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typedef enum {
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GPIO_NOPULL = 4, /**< do not use internal pull resistors */
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GPIO_PULLUP = 9, /**< enable internal pull-up resistor */
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GPIO_PULLDOWN = 8 /**< enable internal pull-down resistor */
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} gpio_pp_t;
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/** @} */
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/**
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* @brief Override flank configuration values
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* @{
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*/
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#define HAVE_GPIO_FLANK_T
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typedef enum {
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GPIO_RISING = 1, /**< emit interrupt on rising flank */
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GPIO_FALLING = 2, /**< emit interrupt on falling flank */
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GPIO_BOTH = 3 /**< emit interrupt on both flanks */
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} gpio_flank_t;
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/** @} */
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/**
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* @brief Available ports on the SAM3X8E
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*/
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enum {
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PA = 0, /**< port A */
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PB = 1, /**< port B */
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PC = 2, /**< port C */
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PD = 3, /**< port D */
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};
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/**
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* @brief GPIO mux configuration
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*/
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typedef enum {
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GPIO_MUX_A = 0, /**< alternate function A */
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GPIO_MUX_B = 1, /**< alternate function B */
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} gpio_mux_t;
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/**
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* @brief UART configuration data
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*/
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typedef struct {
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Uart *dev; /**< U(S)ART device used */
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Pio *rx_port; /**< port for RX pin */
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Pio *tx_port; /**< port for TX pin */
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uint8_t rx_pin; /**< RX pin */
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uint8_t tx_pin; /**< TX pin */
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gpio_mux_t mux; /**< MUX used for pins */
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uint8_t pmc_id; /**< bit in the PMC register of the device*/
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uint8_t irqn; /**< interrupt number of the device */
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} uart_conf_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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