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https://github.com/RIOT-OS/RIOT.git
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849c76578a
Allow to run the main clock and all peripheral clocks off XOSC. This is necessary if we want to use the buck voltage regulator.
103 lines
2.2 KiB
C
103 lines
2.2 KiB
C
/*
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* Copyright (C) 2019 ML!PA Consulting GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_samd5x
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* @brief CPU specific definitions for internal peripheral handling
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Benjamin Valentin <benjamin.valentin@ml-pa.com>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include <limits.h>
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#include "periph_cpu_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief DFLL runs at at fixed frequency of 48 MHz
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*/
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#define SAM0_DFLL_FREQ_HZ (48000000U)
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/**
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 * @brief XOSC is used to generate a fixed frequency of 48 MHz
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 */
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#define SAM0_XOSC_FREQ_HZ (XOSC0_FREQUENCY ? XOSC0_FREQUENCY : XOSC1_FREQUENCY)
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/**
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* @brief DPLL must run with at least 96 MHz
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*/
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#define SAM0_DPLL_FREQ_MIN_HZ (96000000U)
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/**
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* @brief DPLL frequency must not exceed 200 MHz
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*/
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#define SAM0_DPLL_FREQ_MAX_HZ (200000000U)
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/**
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* @name Power mode configuration
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* @{
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*/
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#define PM_NUM_MODES (3)
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/** @} */
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/**
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* @name SAMD5x GCLK definitions
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* @{
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*/
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enum {
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SAM0_GCLK_MAIN = 0, /**< 120 MHz main clock */
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SAM0_GCLK_32KHZ, /**< 32 kHz clock */
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SAM0_GCLK_8MHZ, /**< 8 MHz clock for xTimer */
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SAM0_GCLK_48MHZ, /**< 48 MHz DFLL clock */
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};
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/** @} */
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/**
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* @brief Override SPI hardware chip select macro
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*
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* As of now, we do not support HW CS, so we always set it to a fixed value
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*/
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#define SPI_HWCS(x) (UINT_MAX - 1)
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/**
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* @brief The MCU has a 12 bit DAC
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*/
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#define DAC_RES_BITS (12)
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/**
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* @brief The MCU has two DAC outputs.
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*/
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#define DAC_NUMOF (2)
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/**
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* @name Real time counter configuration
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* @{
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*/
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#define RTT_MAX_VALUE (0xffffffff)
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#define RTT_CLOCK_FREQUENCY (32768U) /* in Hz */
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#define RTT_MIN_FREQUENCY (RTT_CLOCK_FREQUENCY / 1024U) /* in Hz */
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#define RTT_MAX_FREQUENCY (RTT_CLOCK_FREQUENCY) /* in Hz */
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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