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The STM32 line of microcontrollers comes with a bootloader in the ROM. It provides the option to flash the device firmware in DFU mode (USB) or via UART or SPI. To enter the bootloader we have to jump to a specific address in memory, but before reset the CPU to make sure the system is in a known state. This enables us to use the usb_board_reset module on all STM32 platforms.
66 lines
1.8 KiB
C
66 lines
1.8 KiB
C
/*
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* Copyright (C) 2015-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief STM32F0 CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_F0_PERIPH_CPU_H
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#define PERIPH_F0_PERIPH_CPU_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef DOXYGEN
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/**
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* @brief Starting address of the ROM bootloader
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* see application note AN2606
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*/
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#if defined(CPU_LINE_STM32F030x4) || defined(CPU_LINE_STM32F030x6) || \
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defined(CPU_LINE_STM32F030x8) || defined(CPU_LINE_STM32F031x6) || \
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defined(CPU_LINE_STM32F051x8)
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#define STM32_BOOTLOADER_ADDR (0x1FFFEC00)
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#elif defined(CPU_LINE_STM32F072xB) || defined(CPU_LINE_STM32F070xB)
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#define STM32_BOOTLOADER_ADDR (0x1FFFC800)
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#elif defined(CPU_LINE_STM32F030xC) || defined(CPU_LINE_STM32F091xC)
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#define STM32_BOOTLOADER_ADDR (0x1FFFD800)
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#elif defined(CPU_LINE_STM32F042x6)
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#define STM32_BOOTLOADER_ADDR (0x1FFFC400)
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#endif
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/**
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* @brief Override ADC resolution values
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* @{
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*/
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = (0x3 << 3), /**< ADC resolution: 6 bit */
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ADC_RES_8BIT = (0x2 << 3), /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = (0x1 << 3), /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = (0x0 << 3), /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = (0xfe), /**< not applicable */
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ADC_RES_16BIT = (0xff) /**< not applicable */
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} adc_res_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_F0_PERIPH_CPU_H */
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/** @} */
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