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95 lines
1.6 KiB
C
95 lines
1.6 KiB
C
/*
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* Copyright (C) 2019 Ken Rabold
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup boards_hifive1b
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* @{
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*
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* @file
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* @brief Peripheral specific definitions for the HiFive1b RISC-V board
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*
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* @author Ken Rabold
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Core Clock configuration
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* @{
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*/
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/* As defined in boards/hifive1/board.c CPU_DESIRED_FREQ **/
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#define CLOCK_CORECLOCK (200000000ul)
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/** @} */
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/**
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* @name Xtimer configuration
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* @{
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*/
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#define XTIMER_DEV (0)
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#define XTIMER_CHAN (0)
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#define XTIMER_WIDTH (32)
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#define XTIMER_HZ (32768ul)
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/** @} */
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/**
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* @name Timer configuration
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*
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* @{
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*/
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#define TIMER_NUMOF (1)
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/** @} */
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/**
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* @name RTT/RTC configuration
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*
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* @{
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*/
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#define RTT_FREQUENCY (1) /* in Hz */
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#define RTT_MAX_VALUE (0xFFFFFFFF)
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#define RTT_INTR_PRIORITY (2)
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/** @} */
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/**
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* @name GPIO configuration
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*
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* @{
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*/
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#define GPIO_INTR_PRIORITY (3)
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/** @} */
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/**
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* @name PWM configuration
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*
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* @{
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*/
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#define PWM_NUMOF (3)
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/** @} */
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/**
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* @name UART configuration
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*
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* @{
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*/
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#define UART_NUMOF (2)
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#define UART0_RX_INTR_PRIORITY (2)
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#define UART1_RX_INTR_PRIORITY (2)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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