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134 lines
4.3 KiB
C
134 lines
4.3 KiB
C
/*
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* Copyright (C) 2016 Freie Universität Berlin
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* 2017 OTA keys S.A.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief I2C CPU specific definitions for the STM32 family
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Vincent Dupont <vincent@otakeys.com>
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*/
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#ifndef PERIPH_CPU_I2C_H
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#define PERIPH_CPU_I2C_H
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#include <stdint.h>
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#include "cpu.h"
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#include "periph/cpu_gpio.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Use the shared I2C functions
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* @{
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*/
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/** Use read reg function from periph common */
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#define PERIPH_I2C_NEED_READ_REG
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/** Use write reg function from periph common */
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#define PERIPH_I2C_NEED_WRITE_REG
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/** Use read regs function from periph common */
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#define PERIPH_I2C_NEED_READ_REGS
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#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
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defined(CPU_FAM_STM32L1) || defined(CPU_FAM_STM32F4) || \
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defined(CPU_FAM_STM32MP1)
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/** Use write regs function from periph common */
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#define PERIPH_I2C_NEED_WRITE_REGS
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#endif
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/** @} */
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#ifndef DOXYGEN
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/**
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* @brief Default mapping of I2C bus speed values
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* @{
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*/
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#define HAVE_I2C_SPEED_T
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typedef enum {
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#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
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defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L1) || \
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defined(CPU_FAM_STM32MP1)
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I2C_SPEED_LOW, /**< low speed mode: ~10kit/s */
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#endif
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I2C_SPEED_NORMAL, /**< normal mode: ~100kbit/s */
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I2C_SPEED_FAST, /**< fast mode: ~400kbit/s */
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#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
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defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \
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defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB) || \
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defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32G0) || \
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defined(CPU_FAM_STM32L5) || defined(CPU_FAM_STM32U5) || \
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defined(CPU_FAM_STM32WL)
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I2C_SPEED_FAST_PLUS, /**< fast plus mode: ~1Mbit/s */
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#endif
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} i2c_speed_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief Structure for I2C configuration data
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*/
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typedef struct {
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I2C_TypeDef *dev; /**< i2c device */
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i2c_speed_t speed; /**< i2c bus speed */
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gpio_t scl_pin; /**< scl pin number */
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gpio_t sda_pin; /**< sda pin number */
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#ifndef CPU_FAM_STM32F1
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gpio_af_t scl_af; /**< scl pin alternate function value */
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gpio_af_t sda_af; /**< sda pin alternate function value */
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#endif
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uint8_t bus; /**< APB bus */
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uint32_t rcc_mask; /**< bit in clock enable register */
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#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3)
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uint32_t rcc_sw_mask; /**< bit to switch I2C clock */
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#endif
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#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
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defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L1) || \
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defined(CPU_FAM_STM32MP1)
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uint32_t clk; /**< bus frequency as defined in board config */
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#endif
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uint8_t irqn; /**< I2C event interrupt number */
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} i2c_conf_t;
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#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
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defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \
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defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB) || \
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defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32G0) || \
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defined(CPU_FAM_STM32L5) || defined(CPU_FAM_STM32U5) || \
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defined(CPU_FAM_STM32WL)
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/**
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* @brief Structure for I2C timing register settings
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*
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* These parameters are valid for 48MHz (16MHz for L0) input clock.
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* See reference manual of supported CPU for example of timing settings:
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* - STM32F030/F070: see RM0360, section 22.4.10, p.560, table 76
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* - STM32F303: see RM0316, section 28.4.9, p.849, table 148
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* - STM32F72X: see RM0431, section 26.4.9, p.851, table 149
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* - STM32L0x2: see RM0376, section 27.4.10, p.686, table 117
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* - STM32L4X5/6: see RM0351, section 39.4.9, p.1297, table 234
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*/
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typedef struct {
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uint8_t presc; /**< Timing prescaler value */
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uint8_t scll; /**< SCL Low period */
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uint8_t sclh; /**< SCL High period */
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uint8_t sdadel; /**< Data hold time */
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uint8_t scldel; /**< Data setup time */
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} i2c_timing_param_t;
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_I2C_H */
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/** @} */
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