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09a2a11dd7
`top_of_stack` isn't aligned down to the previous 16 byte aligned address. Furthermore, `top_of_stack` as well as `XT_CP_SIZE` are used unaligned in `cpu/esp_common/vendor/xtensa/portasm.S` in the address computation for the coprocessor save area, . Aligning pointer `p` down to the previous 16 byte aligned address results in a wrong address of the coprocessor save area during the initialization of the thread context. This leads to wrong values and wrong positions of these values in the coprocessor save area in inital thread context. Since ESP8266 doesn't have a coprocessor, this bug affects only ESP32.
324 lines
11 KiB
C
324 lines
11 KiB
C
/*
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* Copyright (C) 2018 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp8266
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* @{
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*
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* @file
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* @brief Implementation of the kernel's architecture dependent thread interface
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*
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* @}
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*/
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/*
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* PLEASE NOTE: Some parts of the code are taken from the FreeRTOS port for
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* Xtensa processors from Cadence Design Systems. These parts are marked
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* accordingly. For these parts, the following license is valid:
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*
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* Copyright (c) 2003-2015 Cadence Design Systems, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#define ENABLE_DEBUG 0
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#include "debug.h"
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#include <stdio.h>
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#include <string.h>
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#include "board.h"
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#include "cpu.h"
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#include "irq.h"
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#include "log.h"
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#include "thread.h"
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#include "sched.h"
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#include "common.h"
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#include "esp/common_macros.h"
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#include "esp/xtensa_ops.h"
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#include "sdk/ets_task.h"
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#include "sdk/rom.h"
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#include "sdk/sdk.h"
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#include "tools.h"
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#include "xtensa/xtensa_context.h"
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/* User exception dispatcher when exiting */
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extern void _xt_user_exit(void);
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/* Switch context to the highest priority ready task without context save */
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extern void _frxt_dispatch(void);
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/* Set an flag indicating that a task switch is required on return from interrupt */
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extern void _frxt_setup_switch(void);
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/* Switch context to the highest priority ready task with context save */
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extern void vPortYield(void);
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extern void vPortYieldFromInt(void);
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char* thread_stack_init(thread_task_func_t task_func, void *arg, void *stack_start, int stack_size)
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{
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/*
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* Stack layout after task stack initialization
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*
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* +------------------------+
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* | | TOP
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* | thread_control_block |
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* stack_start + stack_size ==> | |
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* +------------------------+
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* top_of_stack ==> | |
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* | XT_CP_FRAME |
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* | (optional) |
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* top_of_stack + 1 - XT_CP_SIZE ==> | |
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* +------------------------+
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* | |
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* | XT_STK_FRAME |
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* | | XT_STK_...
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* | a2 = arg | XT_STK_A2
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* | a1 = sp + XT_STK_FRMSZ | XT_STK_A1
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* | a0 = sched_task_exit | XT_STK_A0
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* | ps = PS_UM | PS_EXCM | XT_STK_PS
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* | pc = task_func | XT_STK_PC
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* sp = top_of_stack + 1 - XT_CP_SIZE ==> | exit = _xt_user_exit | XT_STK_EXIT
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* - XT_STK_FRMSZ +------------------------+
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* | |
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* | remaining stack space |
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* | available for data |
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* stack_start (preallocated var) ==> | | BOTTOM
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* +------------------------+
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*
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* Initialized stack frame represents the registers as set when the
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* the task function would have been called.
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*
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* Registers in a called function
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*
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* pc - PC at the beginning in the function
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* a0 - return address from the function (return address to caller)
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* a1 - current stack pointer at the beginning in the function
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* a2 - first argument of the function
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*/
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/* stack is [stack_start+0 ... stack_start+stack_size-1] */
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uint8_t *top_of_stack;
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uint8_t *sp;
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top_of_stack = (uint8_t*)((uint32_t)stack_start + stack_size-1);
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/* Clear whole stack with a known value to assist debugging */
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#if !defined(DEVELHELP) && !defined(SCHED_TEST_STACK)
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/* Unfortunatly, this affects thread_measure_stack_free function */
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memset(stack_start, 0, stack_size);
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#endif
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/* BEGIN - code from FreeRTOS port for Xtensa from Cadence */
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/* Create interrupt stack frame aligned to 16 byte boundary */
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sp = (uint8_t*)(((uint32_t)(top_of_stack+1) - XT_STK_FRMSZ - XT_CP_SIZE) & ~0xf);
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/* ensure that stack is big enough */
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assert (sp > (uint8_t*)stack_start);
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XtExcFrame* exc_frame = (XtExcFrame*)sp;
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/* Explicitly initialize certain saved registers */
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exc_frame->pc = (uint32_t)task_func; /* task entry point */
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exc_frame->a0 = (uint32_t)sched_task_exit; /* task exit point (CHANGED) */
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exc_frame->a1 = (uint32_t)sp + XT_STK_FRMSZ; /* physical top of stack frame */
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exc_frame->a2 = (uint32_t)arg; /* parameters for task_func */
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exc_frame->exit = (uint32_t)_xt_user_exit; /* user exception exit dispatcher */
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/* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */
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/* Also set entry point argument parameter. */
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#ifdef __XTENSA_CALL0_ABI__
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/* CALL0 ABI */
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exc_frame->ps = PS_UM | PS_EXCM;
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#else
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/* + for windowed ABI also set WOE and CALLINC (pretend task was 'call4'd). */
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exc_frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1);
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#endif
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#ifdef XT_USE_SWPRI
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/* Set the initial virtual priority mask value to all 1's. */
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exc_frame->vpri = 0xFFFFFFFF;
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#endif
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#if XCHAL_CP_NUM > 0
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/*
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* Init the coprocessor save area (see xtensa_context.h)
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* No access to TCB here, so derive indirectly. Stack growth is top to bottom.
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* p = (uint32_t *) xMPUSettings->coproc_area;
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*/
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uint32_t *p;
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p = (uint32_t *)(((uint32_t) pxTopOfStack - XT_CP_SIZE));
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p[0] = 0;
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p[1] = 0;
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p[2] = (((uint32_t) p) + 12 + XCHAL_TOTAL_SA_ALIGN - 1) & -XCHAL_TOTAL_SA_ALIGN;
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#endif
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/* END - code from FreeRTOS port for Xtensa from Cadence */
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DEBUG("%s start=%p size=%d top=%p sp=%p free=%u\n",
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__func__, stack_start, stack_size, top_of_stack, sp, sp-(uint8_t*)stack_start);
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return (char*)sp;
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}
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unsigned sched_interrupt_nesting = 0; /* Interrupt nesting level */
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#ifdef CONTEXT_SWITCH_BY_INT
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/**
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* Context switches are realized using software interrupts
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*/
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void IRAM thread_yield_isr(void* arg)
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{
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/* set the context switch flag (indicates that context has to be switched
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is switch on exit from interrupt in _frxt_int_exit */
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_frxt_setup_switch();
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}
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#endif
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void thread_yield_higher(void)
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{
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/* reset hardware watchdog */
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system_soft_wdt_feed();
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/* yield next task */
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#if defined(ENABLE_DEBUG) && defined(DEVELHELP)
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if (sched_active_thread) {
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DEBUG("%u old task %u %s %u\n", phy_get_mactime(),
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sched_active_thread->pid, sched_active_thread->name,
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sched_active_thread->sp - sched_active_thread-> stack_start);
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}
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#endif
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if (!irq_is_in()) {
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#ifdef CONTEXT_SWITCH_BY_INT
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WSR(BIT(ETS_SOFT_INUM), interrupt);
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#else
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vPortYield();
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#endif
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}
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else {
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_frxt_setup_switch();
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}
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#if defined(ENABLE_DEBUG) && defined(DEVELHELP)
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if (sched_active_thread) {
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DEBUG("%u new task %u %s %u\n", phy_get_mactime(),
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sched_active_thread->pid, sched_active_thread->name,
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sched_active_thread->sp - sched_active_thread-> stack_start);
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}
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#endif
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return;
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}
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void thread_stack_print(void)
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{
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/* Print the current stack to stdout. */
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#if defined(DEVELHELP)
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volatile thread_t* task = thread_get(sched_active_pid);
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if (task) {
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char* stack_top = task->stack_start + task->stack_size;
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int size = stack_top - task->sp;
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printf("Printing current stack of thread %" PRIkernel_pid "\n", thread_getpid());
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esp_hexdump((void*)(task->sp), size >> 2, 'w', 8);
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}
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#else
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NOT_SUPPORTED();
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#endif
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}
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void thread_print_stack(void)
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{
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/* Prints human readable, ps-like thread information for debugging purposes. */
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/* because of Xtensa stack structure and call0 ABI, it is not possible to implement */
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NOT_YET_IMPLEMENTED();
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return;
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}
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#if defined(DEVELHELP)
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extern uint8_t port_IntStack;
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extern uint8_t port_IntStackTop;
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void thread_isr_stack_init(void)
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{
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/* code from thread.c, please see the copyright notice there */
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/* assign each int of the stack the value of it's address */
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uintptr_t *stackmax = (uintptr_t *)&port_IntStackTop;
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uintptr_t *stackp = (uintptr_t *)&port_IntStack;
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while (stackp < stackmax) {
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*stackp = (uintptr_t) stackp;
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stackp++;
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}
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}
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int thread_isr_stack_usage(void)
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{
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return &port_IntStackTop - &port_IntStack -
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thread_measure_stack_free((char*)&port_IntStack);
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}
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void *thread_isr_stack_pointer(void)
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{
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/* Get the current ISR stack pointer. */
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return &port_IntStackTop;
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}
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void *thread_isr_stack_start(void)
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{
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/* Get the start of the ISR stack. */
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return &port_IntStack;
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}
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void thread_isr_stack_print(void)
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{
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printf("Printing current ISR\n");
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esp_hexdump(&port_IntStack, &port_IntStackTop-&port_IntStack, 'w', 8);
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}
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#else /* DEVELHELP */
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void thread_isr_stack_init(void) {}
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#endif /* DEVELHELP */
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NORETURN void cpu_switch_context_exit(void)
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{
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/* Switch context to the highest priority ready task without context save */
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_frxt_dispatch();
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UNREACHABLE();
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}
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