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33 lines
1.2 KiB
Makefile
33 lines
1.2 KiB
Makefile
# Define the CPU family so we can differentiate between them in the code
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CFLAGS += -DCPU_FAM_$(call uppercase_and_underscore,$(CPU_FAM))
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# Generate ASF compatible model definition
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CFLAGS += -D__$(call uppercase_and_underscore,$(CPU_MODEL))__
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# Compute CPU_LINE
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LINE := $(shell echo $(CPU_MODEL) | sed -E -e 's/^sam([a-z][0-9][0-9])(.)([0-9][0-9])(.)/\1 \2 \3 \4/')
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FAMILY := $(word 1, $(LINE))
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TYPE1 := $(word 2, $(LINE))
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MEMORY := $(word 3, $(LINE))
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TYPE2 := $(word 4, $(LINE))
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# ROM length is directly encoded in the part number
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ROM_LEN := $(shell echo $$((1 << $(MEMORY))))
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# get vendor file to extract RAM length
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VENDOR_FILE := $(shell find $(RIOTCPU)/sam0_common/include/vendor/sam$(FAMILY) -name $(CPU_MODEL).h | grep include.*/sam)
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RAM_LEN := $(shell sed -E -n 's/\#define (HMCRAMC0_SIZE|HSRAM_SIZE).*(0x[[:xdigit:]]*).*/\2/p' $(VENDOR_FILE))
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ROM_START_ADDR ?= 0x00000000
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RAM_START_ADDR ?= 0x20000000
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# this CPU implementation doesn't use CMSIS initialization
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CFLAGS += -DDONT_USE_CMSIS_INIT
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CFLAGS += -DDONT_USE_PREDEFINED_CORE_HANDLERS
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CFLAGS += -DDONT_USE_PREDEFINED_PERIPHERALS_HANDLERS
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# For Cortex-M cpu we use the common cortexm.ld linker script
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LINKER_SCRIPT ?= cortexm.ld
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INCLUDES += -I$(RIOTCPU)/sam0_common/include
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