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87 lines
1.7 KiB
C
87 lines
1.7 KiB
C
/*
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* Copyright (C) 2014-2019 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_cortexm_common
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* @{
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*
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* @file
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* @brief Implementation of the kernels irq interface
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef IRQ_ARCH_H
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#define IRQ_ARCH_H
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#include <stdbool.h>
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#include <stdint.h>
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#include "cpu_conf.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Disable all maskable interrupts
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*/
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static inline __attribute__((always_inline)) unsigned int irq_disable(void)
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{
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uint32_t mask = __get_PRIMASK();
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__disable_irq();
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return mask;
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}
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/**
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* @brief Enable all maskable interrupts
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*/
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static inline __attribute__((always_inline)) __attribute__((used)) unsigned int
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irq_enable(void)
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{
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unsigned result = __get_PRIMASK();
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__enable_irq();
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return result;
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}
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/**
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* @brief Restore the state of the IRQ flags
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*/
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static inline __attribute__((always_inline)) void irq_restore(
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unsigned int state)
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{
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__set_PRIMASK(state);
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}
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/**
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* @brief See if IRQs are currently enabled
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*/
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static inline __attribute__((always_inline)) bool irq_is_enabled(void)
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{
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/* so far, all existing Cortex-M are only using the least significant bit
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* in the PRIMARK register. If ever any other bit is used for different
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* purposes, this function will not work properly anymore. */
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return (__get_PRIMASK() == 0);
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}
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/**
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* @brief See if the current context is inside an ISR
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*/
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static inline __attribute__((always_inline)) bool irq_is_in(void)
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{
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return (__get_IPSR() & 0xFF);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* IRQ_ARCH_H */
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/** @} */
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