mirror of
https://github.com/RIOT-OS/RIOT.git
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73a3943268
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
145 lines
3.0 KiB
C
145 lines
3.0 KiB
C
/*
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* Copyright (C) 2014-2017 Freie Universität Berlin
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* 2015 Jan Wagner <mail@jwagner.eu>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_nrf5x_common
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* @ingroup drivers_periph_rtt
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* @{
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*
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* @file
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* @brief RTT implementation for NRF5x CPUs
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Jan Wagner <mail@jwagner.eu>
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*
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* @}
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*/
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#include "cpu.h"
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#include "nrf_clock.h"
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#include "periph/rtt.h"
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/* get the IRQ configuration */
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#ifdef NRF_RTC0_S
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#if (RTT_DEV == 0)
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#define DEV NRF_RTC0_S
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#define ISR isr_rtc0
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#define IRQn RTC0_IRQn
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#elif (RTT_DEV == 1)
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#define DEV NRF_RTC1_S
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#define ISR isr_rtc1
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#define IRQn RTC1_IRQn
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#else
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#error "RTT configuration: invalid or no RTC device specified (RTT_DEV)"
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#endif
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#else
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#if (RTT_DEV == 1)
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#define DEV NRF_RTC1
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#define ISR isr_rtc1
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#define IRQn RTC1_IRQn
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#elif (RTT_DEV == 2)
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#define DEV NRF_RTC2
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#define ISR isr_rtc2
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#define IRQn RTC2_IRQn
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#else
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#error "RTT configuration: invalid or no RTC device specified (RTT_DEV)"
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#endif
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#endif /* def NRF_RTC0_S */
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/* allocate memory for callbacks and their args */
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static rtt_cb_t alarm_cb;
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static void *alarm_arg;
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static rtt_cb_t overflow_cb;
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static void *overflow_arg;
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void rtt_init(void)
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{
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/* enable the low-frequency clock */
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clock_start_lf();
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/* make sure device is powered */
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#ifdef CPU_FAM_NRF51
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DEV->POWER = 1;
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#endif
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/* stop the RTT during configuration */
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DEV->TASKS_STOP = 1;
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/* configure interrupt */
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NVIC_EnableIRQ(IRQn);
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/* set prescaler */
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DEV->PRESCALER = (RTT_CLOCK_FREQUENCY / RTT_FREQUENCY) - 1;
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/* start the actual RTT thing */
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DEV->TASKS_START = 1;
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}
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void rtt_set_overflow_cb(rtt_cb_t cb, void *arg)
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{
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overflow_cb = cb;
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overflow_arg = arg;
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DEV->INTENSET = RTC_INTENSET_OVRFLW_Msk;
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}
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void rtt_clear_overflow_cb(void)
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{
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DEV->INTENCLR = RTC_INTENCLR_OVRFLW_Msk;
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}
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uint32_t rtt_get_counter(void)
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{
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return DEV->COUNTER;
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}
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void rtt_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg)
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{
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alarm_cb = cb;
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alarm_arg = arg;
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DEV->CC[0] = (alarm & RTT_MAX_VALUE);
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DEV->INTENSET = RTC_INTENSET_COMPARE0_Msk;
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}
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uint32_t rtt_get_alarm(void)
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{
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return DEV->CC[0];
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}
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void rtt_clear_alarm(void)
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{
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DEV->INTENCLR = RTC_INTENSET_COMPARE0_Msk;
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}
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void rtt_poweron(void)
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{
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#ifdef CPU_FAM_NRF51
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DEV->POWER = 1;
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#endif
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DEV->TASKS_START = 1;
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}
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void rtt_poweroff(void)
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{
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DEV->TASKS_STOP = 1;
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#ifdef CPU_FAM_NRF51
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DEV->POWER = 0;
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#endif
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}
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void ISR(void)
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{
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if (DEV->EVENTS_COMPARE[0] == 1) {
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DEV->EVENTS_COMPARE[0] = 0;
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DEV->INTENCLR = RTC_INTENSET_COMPARE0_Msk;
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alarm_cb(alarm_arg);
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}
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if (DEV->EVENTS_OVRFLW == 1) {
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DEV->EVENTS_OVRFLW = 0;
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overflow_cb(overflow_arg);
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}
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cortexm_isr_end();
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}
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