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122 lines
3.6 KiB
C
122 lines
3.6 KiB
C
/*
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* Copyright (C) 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_msp430
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* @{
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*
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* @file
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* @brief Cortex CMSIS style definition of MSP430 registers
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*
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* @todo This file is incomplete, not all registers are listed. Further
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* There are probably some inconsistencies throughout the MSP430
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* family which need to be addressed.
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef MSP430_REGS_COMMON_H
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#define MSP430_REGS_COMMON_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Shortcut to specify 8-bit wide registers
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*/
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#define REG8 volatile uint8_t
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/**
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* @brief Shortcut to specify 16-bit wide registers
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*/
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#define REG16 volatile uint16_t
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/**
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* @name Timer SSEL Values
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*
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* @details When using the macros in the vendor header files such as TASSEL_0
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* the actually used clock is non-obvious. Hence, provide aliases
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* with obvious names.
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* @{
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*/
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#define TXSSEL_TXCLK TASSEL_0 /**< External TxCLK as clock source */
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#define TXSSEL_ACLK TASSEL_1 /**< Auxiliary clock as clock source */
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#define TXSSEL_SMCLK TASSEL_2 /**< Sub-system master clock as clock source */
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#define TXSSEL_INCLK TASSEL_3 /**< External INCLK as clock source */
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/** @} */
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/**
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* @name Timer Input Divider Values
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*
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* @details The vendor header macros are again non-obvious in their naming, so
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* provide better alias names.
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* @{
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*/
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#define TXID_DIV_1 ID_0 /**< Input Divider: Divide by 1 */
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#define TXID_DIV_2 ID_1 /**< Input Divider: Divide by 2 */
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#define TXID_DIV_4 ID_2 /**< Input Divider: Divide by 4 */
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#define TXID_DIV_8 ID_3 /**< Input Divider: Divide by 8 */
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#define TXID_DIV_Msk ID_3 /**< Mask to get the TXID field */
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#define TXID_DIV_Pos 6U /**< Position of the TXID field */
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#define TXID_DIV_MAX 3 /**< Maximum configuration value in the TXID field */
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/** @} */
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/**
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* @name Timer Mode Control Values
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*
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* @details The vendor header macros are again non-obvious in their naming, so
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* provide better alies names.
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* @{
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*/
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#define TXMC_STOP MC_0 /**< Stop Mode */
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#define TXMC_UP MC_1 /**< Up to CCR0 Mode*/
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#define TXMC_CONT MC_2 /**< Continuous Mode */
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#define TXMC_UP_DOWN MC_3 /**< Up/Down Mode */
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#define TXMC_MASK MC_3 /**< Bitmask to retrieve MC field */
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/** @} */
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/**
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* @brief Common MSP GPIO Port Registers
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*/
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typedef struct {
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REG8 IN; /**< input data */
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REG8 OD; /**< output data */
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REG8 DIR; /**< pin direction */
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} msp430_port_t;
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/**
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* @brief GPIO Port 3..6 (without interrupt functionality)
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*/
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typedef struct {
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msp430_port_t base; /**< common GPIO port registers */
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REG8 SEL; /**< alternative function select */
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} msp430_port_p3_p6_t;
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/**
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* @brief Timer peripheral registers
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*
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* @note The TIMER_A timer only has 3 CC channels instead of the 8 channels
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* the TIMER_B has, the memory layout is the same nonetheless.
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*/
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typedef struct {
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REG16 CTL; /**< timer control */
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REG16 CCTL[7]; /**< capture compare channel control */
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REG16 R; /**< current counter value */
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REG16 CCR[7]; /**< capture compare channel values */
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} msp430_timer_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* MSP430_REGS_COMMON_H */
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/** @} */
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