mirror of
https://github.com/RIOT-OS/RIOT.git
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7c5b16abe5
This reverts commit 4fa25af86c
.
250 lines
7.0 KiB
Plaintext
250 lines
7.0 KiB
Plaintext
/*
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* Copyright 2013, Freie Universitaet Berlin (FUB). All rights reserved.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/* specify the LPC23XX memory areas (see LPC2387 datasheet page 15) */
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MEMORY
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{
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rom (rx) : ORIGIN = 0, LENGTH = 504K /* FLASH ROM 512kByte without ISP bootloader*/
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infomem : ORIGIN = 0x0007D000, LENGTH = 4K /* Last sector in FLASH ROM for config data */
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ram_battery : ORIGIN = 0xE0084000, LENGTH = 2K /* Battery RAM */
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ram (w!rx) : ORIGIN = 0x40000000, LENGTH = 64K /* LOCAL ON-CHIP STATIC RAM */
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ram_usb : ORIGIN = 0x7FD00000, LENGTH = 16K /* USB RAM !!! first 1024 bytes are occupied from GPDMA for MCI */
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ram_ethernet : ORIGIN = 0x7FE00000, LENGTH = 16K /* ethernet RAM */
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}
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/* now define the output sections */
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SECTIONS
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{
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.text : /* collect all sections that should go into FLASH after startup */
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{
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KEEP(*(.vectors)) /* Exception Vectors and branch table >= 64 bytes */
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. = ALIGN(64);
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KEEP(*(.init))
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KEEP(*(.init0)) /* Start here after reset. */
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*(.text .text.* .gnu.linkonce.t.*)
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*(.glue_7t) *(.glue_7)
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*(.rodata .rodata* .gnu.linkonce.r.*)
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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/* Support C constructors, and C destructors in both user code
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and the C library. This also provides support for C++ code. */
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. = ALIGN(4);
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KEEP(*(.init))
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. = ALIGN(4);
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__preinit_array_start = .;
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KEEP (*(.preinit_array))
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__preinit_array_end = .;
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. = ALIGN(4);
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__init_array_start = .;
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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__init_array_end = .;
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. = ALIGN(0x4);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*crtend.o(.ctors))
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. = ALIGN(4);
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KEEP(*(.fini))
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. = ALIGN(4);
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__fini_array_start = .;
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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__fini_array_end = .;
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*crtend.o(.dtors))
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KEEP (*(SORT(.roxfa.*)))
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. = ALIGN(4);
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_efixed = .; /* End of text section */
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} > rom
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/*
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* TLS relocations are offsets relative to the address
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* of the first TLS symbol. That means we just need to
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* allocate them all together so that the TLS region
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* is compact when allocated for each thread.
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*/
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/*
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* TLS initialization data is loaded into ROM so that
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* each thread can get its values initialized from there
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* at startup
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*/
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.tdata :
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{
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__tdata_start = .;
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*(.tdata .tdata.* .gnu.linkonce.td.*)
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__tdata_end = .;
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} > rom
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__tdata_source = LOADADDR(.tdata);
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__tdata_size = SIZEOF(.tdata);
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/*
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* TLS zeroed data is relocated as if it immediately followed
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* the tdata values. However, the linker 'magically' erases the
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* memory allocation so that no ROM is consumed by this
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* section
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*/
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.tbss :
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{
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*(.tbss .tbss.* .gnu.linkonce.tb.*)
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*(.tcommon)
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__tbss_end = .;
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} > rom
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__tls_size = __tbss_end - __tdata_start;
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__tbss_size = __tls_size - __tdata_size;
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PROVIDE( __tls_align = MAX(ALIGNOF(.tdata), ALIGNOF(.tbss)) );
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PROVIDE( __arm32_tls_tcb_offset = MAX(8, __tls_align) );
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PROVIDE( __arm64_tls_tcb_offset = MAX(16, __tls_align) );
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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PROVIDE_HIDDEN (__exidx_start = .);
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > rom
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PROVIDE_HIDDEN (__exidx_end = .);
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/* exception handling */
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. = ALIGN(4);
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.eh_frame :
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{
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KEEP (*(.eh_frame))
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} > rom
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. = ALIGN(4);
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_etext = .;
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.config :
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{
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*(.configmem)
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. = ALIGN(256);
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} > infomem
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/**************************************************************************
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* RAM
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**************************************************************************/
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/*
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* Stacks
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*/
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.stack (NOLOAD) :
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{
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PROVIDE(__stack_start = .);
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KEEP (*(.usr_stack))
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__stack_usr_start = .;
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KEEP (*(.und_stack))
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__stack_und_start = .;
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KEEP (*(.fiq_stack))
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__stack_fiq_start = .;
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KEEP (*(.irq_stack))
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__stack_irq_start = .;
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KEEP (*(.abt_stack))
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__stack_abt_start = .;
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KEEP (*(.svc_stack))
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__stack_svc_start = .;
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PROVIDE(__stack_end = .);
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} > ram
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.relocate :
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{
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. = ALIGN(4);
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_srelocate = .;
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*(.ramfunc .ramfunc.*);
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*(.data .data.*);
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KEEP (*(.openocd .openocd.*))
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KEEP (*(SORT(.xfa.*)))
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. = ALIGN(4);
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_erelocate = .;
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} > ram AT> rom
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/* .bss section which is used for uninitialized data */
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.bss (NOLOAD) :
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{
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. = ALIGN(4);
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_sbss = . ;
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_szero = .;
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*(.bss .bss.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = . ;
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_ezero = .;
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} > ram
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/*
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* collect all uninitialized sections that go into RAM
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*/
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.noinit (NOLOAD) :
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{
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__noinit_start = .;
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PROVIDE(__fiq_handler = .);
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*(.fiq)
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*(.noinit)
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. = ALIGN(4);
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__noinit_end = .;
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} > ram
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/* heap section */
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. = ALIGN(4);
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_sheap = . ;
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_eheap = ORIGIN(ram) + LENGTH(ram);
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/* Populate information about ram size */
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_sram = ORIGIN(ram);
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_eram = ORIGIN(ram) + LENGTH(ram);
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.heap1 ALIGN(4) (NOLOAD) :
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{
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_sheap1 = ORIGIN(ram_ethernet);
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_eheap1 = ORIGIN(ram_ethernet) + LENGTH(ram_ethernet);
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} > ram_ethernet
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. = ORIGIN(ram_usb);
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.usbdata (NOLOAD) : /* USB RAM section, may be used otherwise if USB is disabled */
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{
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*(.usbdata)
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} > ram_usb
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.heap2 ALIGN(4) (NOLOAD) :
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{
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_sheap2 = . ;
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_eheap2 = ORIGIN(ram_usb) + LENGTH(ram_usb);
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} > ram_usb
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_sbackup_data_load = LOADADDR(.backup.data);
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.backup.data : ALIGN(4) {
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_sbackup_data = .;
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*(.backup.data)
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_ebackup_data = .;
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/* Round size so that we can use 4 byte copy in init */
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. = ALIGN(4);
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} > ram_battery AT> rom
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.backup.bss (NOLOAD) : ALIGN(4) {
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_sbackup_bss = .;
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*(.backup.bss)
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_ebackup_bss = .;
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/* Round size so that we can use 4 byte copy in init */
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. = ALIGN(4);
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} > ram_battery
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.heap3 (NOLOAD) : ALIGN(4) {
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_sheap3 = . ;
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_eheap3 = ORIGIN(ram_battery) + LENGTH(ram_battery);
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} > ram_battery
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}
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