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69 lines
1.4 KiB
C
69 lines
1.4 KiB
C
/*
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* Copyright (C) 2015-2017 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_efm32
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* @{
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*
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* @file
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* @brief Implementation specific CPU configuration options
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Bas Stottelaar <basstottelaar@gmail.com>
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*/
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#ifndef CPU_CONF_H
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#define CPU_CONF_H
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#include "cpu_conf_common.h"
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#include "em_device.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief ARM Cortex-M specific CPU configuration
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* @{
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*/
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#define CPU_DEFAULT_IRQ_PRIO (1U)
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#define CPU_IRQ_NUMOF (EXT_IRQ_COUNT + 1)
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#define CPU_FLASH_BASE (FLASH_BASE)
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/** @} */
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/**
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* @brief Flash page configuration
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* @{
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*/
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#define FLASHPAGE_SIZE (FLASH_PAGE_SIZE)
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#define FLASHPAGE_NUMOF (FLASH_SIZE / FLASH_PAGE_SIZE)
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/* The minimum block size which can be written is 4B. However, the erase
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* block is always FLASHPAGE_SIZE.
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*/
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#define FLASHPAGE_WRITE_BLOCK_SIZE (4U)
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/* Writing should be always 4 bytes aligned */
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#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U)
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/** @} */
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/**
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* @brief Bit-Band configuration
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* @{
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*/
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#ifdef BITBAND_RAM_BASE
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#define CPU_HAS_BITBAND 1
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#endif
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* CPU_CONF_H */
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/** @} */
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