mirror of
https://github.com/RIOT-OS/RIOT.git
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111 lines
2.8 KiB
C
111 lines
2.8 KiB
C
/*
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* Copyright (C) 2020 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_nucleo-g474re
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the nucleo-g474re board
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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/* Add specific clock configuration (HSE, LSE) for this board here */
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#ifndef CONFIG_BOARD_HAS_LSE
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#define CONFIG_BOARD_HAS_LSE 1
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#endif
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/* This board provides a 24MHz HSE oscillator */
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#ifndef CONFIG_BOARD_HAS_HSE
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#define CONFIG_BOARD_HAS_HSE 1
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#endif
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/* By default, configure a 80MHz SYSCLK with PLL using HSE as input clock */
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#ifndef CONFIG_CLOCK_PLL_M
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#define CONFIG_CLOCK_PLL_M (6)
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#endif
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#include "periph_cpu.h"
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#include "clk_conf.h"
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#include "cfg_i2c1_pb8_pb9.h"
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#include "cfg_rtt_default.h"
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#include "cfg_timer_tim5.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = LPUART1,
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.rcc_mask = RCC_APB1ENR2_LPUART1EN,
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.rx_pin = GPIO_PIN(PORT_A, 3),
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.tx_pin = GPIO_PIN(PORT_A, 2),
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.rx_af = GPIO_AF12,
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.tx_af = GPIO_AF12,
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.bus = APB12,
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.irqn = LPUART1_IRQn,
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.type = STM32_LPUART,
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.clk_src = 0, /* Use APB clock */
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},
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{ /* Connected to Arduino D0/D1 */
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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.rx_pin = GPIO_PIN(PORT_C, 5),
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.tx_pin = GPIO_PIN(PORT_C, 4),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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.bus = APB2,
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.irqn = USART1_IRQn,
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.type = STM32_USART,
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.clk_src = 0, /* Use APB clock */
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},
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};
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#define UART_0_ISR (isr_lpuart1)
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#define UART_1_ISR (isr_usart1)
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI1,
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.mosi_pin = GPIO_PIN(PORT_A, 7), /* Arduino D11 */
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.miso_pin = GPIO_PIN(PORT_A, 6), /* Arduino D12 */
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.sclk_pin = GPIO_PIN(PORT_A, 5), /* Arduino D13 */
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.cs_pin = GPIO_UNDEF,
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.mosi_af = GPIO_AF5,
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.miso_af = GPIO_AF5,
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.sclk_af = GPIO_AF5,
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.cs_af = GPIO_AF5,
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.rccmask = RCC_APB2ENR_SPI1EN,
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.apbbus = APB2,
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},
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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