mirror of
https://github.com/RIOT-OS/RIOT.git
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ce31f840b1
SPI2 is exposed on the PMOD connector, SPI3 is used internally to communicate with the radio modules onboard
255 lines
6.4 KiB
C
255 lines
6.4 KiB
C
/*
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* Copyright (C) 2017 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_b-l475e-iot01a
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the B-L475E-IOT01A board
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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/* Add specific clock configuration (HSE, LSE) for this board here */
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#ifndef CONFIG_BOARD_HAS_LSE
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#define CONFIG_BOARD_HAS_LSE 1
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#endif
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#include "periph_cpu.h"
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#include "clk_conf.h"
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#include "cfg_rtt_default.h"
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#include "cfg_usb_otg_fs.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name DMA streams configuration
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* @{
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*/
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static const dma_conf_t dma_config[] = {
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{ .stream = 1 }, /* DMA1 Channel 2 - SPI1_RX */
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{ .stream = 2 }, /* DMA1 Channel 3 - SPI1_TX */
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{ .stream = 3 }, /* DMA1 Channel 4 - USART1_TX / SPI2_RX */
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{ .stream = 4 }, /* DMA1 Channel 5 - SPI2_TX */
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{ .stream = 8 }, /* DMA2 Channel 1 - SPI3_RX */
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{ .stream = 9 }, /* DMA2 Channel 2 - SPI3_TX */
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{ .stream = 10 }, /* DMA2 Channel 3 - UART4_TX */
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};
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#define DMA_0_ISR isr_dma1_channel2
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#define DMA_1_ISR isr_dma1_channel3
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#define DMA_2_ISR isr_dma1_channel4
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#define DMA_3_ISR isr_dma1_channel5
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#define DMA_4_ISR isr_dma2_channel1
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#define DMA_5_ISR isr_dma2_channel2
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#define DMA_6_ISR isr_dma2_channel3
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#define DMA_NUMOF ARRAY_SIZE(dma_config)
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/** @} */
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/**
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* @name Timer configuration
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* @{
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*/
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static const timer_conf_t timer_config[] = {
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{
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.dev = TIM5,
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.max = 0xffffffff,
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.rcc_mask = RCC_APB1ENR1_TIM5EN,
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.bus = APB1,
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.irqn = TIM5_IRQn
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}
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};
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#define TIMER_0_ISR isr_tim5
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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.rx_pin = GPIO_PIN(PORT_B, 7),
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.tx_pin = GPIO_PIN(PORT_B, 6),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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.bus = APB2,
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.irqn = USART1_IRQn,
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.type = STM32_USART,
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.clk_src = 0, /* Use APB clock */
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#ifdef MODULE_PERIPH_DMA
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.dma = 2,
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.dma_chan = 2
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#endif
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},
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{
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.dev = UART4,
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.rcc_mask = RCC_APB1ENR1_UART4EN,
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.rx_pin = GPIO_PIN(PORT_A, 1),
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.tx_pin = GPIO_PIN(PORT_A, 0),
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.rx_af = GPIO_AF8,
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.tx_af = GPIO_AF8,
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.bus = APB1,
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.irqn = UART4_IRQn,
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.type = STM32_USART,
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.clk_src = 0, /* Use APB clock */
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#ifdef MODULE_PERIPH_DMA
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.dma = 6,
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.dma_chan = 2
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#endif
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}
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};
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#define UART_0_ISR (isr_usart1)
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#define UART_1_ISR (isr_uart4)
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name PWM configuration
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* @{
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*/
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static const pwm_conf_t pwm_config[] = {
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{
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.dev = TIM2,
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.rcc_mask = RCC_APB1ENR1_TIM2EN,
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.chan = { { .pin = GPIO_PIN(PORT_A, 15), .cc_chan = 0}, /* D9 */
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{ .pin = GPIO_UNDEF, .cc_chan = 0},
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{ .pin = GPIO_UNDEF, .cc_chan = 0},
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{ .pin = GPIO_UNDEF, .cc_chan = 0} },
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.af = GPIO_AF1,
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.bus = APB1
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}
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};
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#define PWM_NUMOF ARRAY_SIZE(pwm_config)
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI1,
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.mosi_pin = GPIO_PIN(PORT_A, 7),
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.miso_pin = GPIO_PIN(PORT_A, 6),
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.sclk_pin = GPIO_PIN(PORT_A, 5),
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.cs_pin = SPI_CS_UNDEF,
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.mosi_af = GPIO_AF5,
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.miso_af = GPIO_AF5,
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.sclk_af = GPIO_AF5,
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.cs_af = GPIO_AF5,
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.rccmask = RCC_APB2ENR_SPI1EN,
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.apbbus = APB2,
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#ifdef MODULE_PERIPH_DMA
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.tx_dma = 1,
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.tx_dma_chan = 1,
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.rx_dma = 0,
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.rx_dma_chan = 1,
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#endif
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},
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{
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.dev = SPI2,
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.mosi_pin = GPIO_PIN(PORT_D, 4),
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.miso_pin = GPIO_PIN(PORT_D, 3),
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.sclk_pin = GPIO_PIN(PORT_D, 1),
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.cs_pin = SPI_CS_UNDEF,
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.mosi_af = GPIO_AF5,
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.miso_af = GPIO_AF5,
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.sclk_af = GPIO_AF5,
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.cs_af = GPIO_AF5,
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.rccmask = RCC_APB1ENR1_SPI2EN,
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.apbbus = APB1,
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#ifdef MODULE_PERIPH_DMA
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.tx_dma = 3,
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.tx_dma_chan = 1,
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.rx_dma = 2,
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.rx_dma_chan = 1,
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#endif
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},
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{
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.dev = SPI3,
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.mosi_pin = GPIO_PIN(PORT_C, 12),
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.miso_pin = GPIO_PIN(PORT_C, 11),
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.sclk_pin = GPIO_PIN(PORT_C, 10),
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.cs_pin = SPI_CS_UNDEF,
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.mosi_af = GPIO_AF6,
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.miso_af = GPIO_AF6,
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.sclk_af = GPIO_AF6,
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.cs_af = GPIO_AF6,
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.rccmask = RCC_APB1ENR1_SPI3EN,
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.apbbus = APB1,
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#ifdef MODULE_PERIPH_DMA
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.tx_dma = 5,
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.tx_dma_chan = 3,
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.rx_dma = 4,
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.rx_dma_chan = 3,
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#endif
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}
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = I2C1,
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.speed = I2C_SPEED_NORMAL,
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.scl_pin = GPIO_PIN(PORT_B, 8),
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.sda_pin = GPIO_PIN(PORT_B, 9),
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.scl_af = GPIO_AF4,
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.sda_af = GPIO_AF4,
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.bus = APB1,
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.rcc_mask = RCC_APB1ENR1_I2C1EN,
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.rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */
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.irqn = I2C1_ER_IRQn,
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},
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{
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.dev = I2C2,
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.speed = I2C_SPEED_NORMAL,
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.scl_pin = GPIO_PIN(PORT_B, 10),
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.sda_pin = GPIO_PIN(PORT_B, 11),
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.scl_af = GPIO_AF4,
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.sda_af = GPIO_AF4,
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.bus = APB1,
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.rcc_mask = RCC_APB1ENR1_I2C2EN,
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.rcc_sw_mask = RCC_CCIPR_I2C2SEL_1, /* HSI (16 MHz) */
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.irqn = I2C2_ER_IRQn,
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},
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};
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#define I2C_0_ISR isr_i2c1_er
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#define I2C_1_ISR isr_i2c2_er
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#define I2C_NUMOF ARRAY_SIZE(i2c_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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