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40 lines
820 B
Plaintext
40 lines
820 B
Plaintext
/*
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* Copyright (C) 2017 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @addtogroup cpu_cortexm_common
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* @{
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*
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* @file
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* @brief Memory definitions for the Cortex-M family
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*
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* @author Francisco Acosta <francisco.acosta@inria.fr>
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*
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* @}
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*/
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ccmram_length = DEFINED( ccmram_len ) ? ccmram_len : 0x0 ;
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sram4_length = DEFINED( sram4_length ) ? sram4_length : 0x0 ;
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MEMORY
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{
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ccmram : ORIGIN = 0x10000000, LENGTH = ccmram_length
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sram4 : ORIGIN = 0x28000000, LENGTH = sram4_length
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}
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SECTIONS
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{
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.heap2 ALIGN(4) (NOLOAD) :
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{
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_sheap2 = . ;
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_eheap2 = ORIGIN(sram4) + LENGTH(sram4);
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} > sram4
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}
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INCLUDE cortexm.ld
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