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98 lines
2.5 KiB
C
98 lines
2.5 KiB
C
/*
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* Copyright (C) 2022 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp32
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* @{
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*
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* @file
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* @brief Implementation of the kernels irq interface
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*
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* @}
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*/
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#include "irq_arch.h"
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#include "esp_attr.h"
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#include "hal/interrupt_controller_types.h"
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#include "hal/interrupt_controller_ll.h"
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#include "soc/periph_defs.h"
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#define ENABLE_DEBUG 0
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#include "debug.h"
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#define RVHAL_EXCM_LEVEL 4
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/**
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* @brief Disable all maskable interrupts
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*/
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unsigned int IRAM_ATTR irq_disable(void)
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{
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uint32_t mstatus;
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/* clear MIE bit in register mstatus */
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__asm__ volatile ("csrrc %0, mstatus, %1" : "=r"(mstatus) : "rK"(MSTATUS_MIE) : "memory");
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/* save interrupt priority level threshold */
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uint32_t state = *((volatile uint32_t *)INTERRUPT_CORE0_CPU_INT_THRESH_REG);
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/* set interrupt priority level threshold to exception level */
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*((volatile uint32_t *)INTERRUPT_CORE0_CPU_INT_THRESH_REG) = RVHAL_EXCM_LEVEL;
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/* set MIE bit in register mstatus */
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__asm__ volatile ("csrrs %0, mstatus, %1" : "=r"(mstatus) : "rK"(MSTATUS_MIE) : "memory");
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DEBUG("%s %02x(%02x)\n", __func__, RVHAL_EXCM_LEVEL, (unsigned)state);
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return state;
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}
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/**
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* @brief Enable all maskable interrupts
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*/
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unsigned int IRAM_ATTR irq_enable(void)
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{
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uint32_t state = *((volatile uint32_t *)INTERRUPT_CORE0_CPU_INT_THRESH_REG);
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/* set interrupt priority level threshold to 0 */
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*((volatile uint32_t *)INTERRUPT_CORE0_CPU_INT_THRESH_REG) = 0;
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/* small delay needed here */
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__asm__ volatile ( "nop" );
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__asm__ volatile ( "nop" );
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__asm__ volatile ( "nop" );
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DEBUG("%s %02x(%02x)\n", __func__, 0, (unsigned)state);
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return state;
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}
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/**
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* @brief Restore the state of the IRQ flags
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*/
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void IRAM_ATTR irq_restore(unsigned int state)
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{
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uint32_t old = *((volatile uint32_t *)INTERRUPT_CORE0_CPU_INT_THRESH_REG);
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/* set interrupt priority level threshold to old level */
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*((volatile uint32_t *)INTERRUPT_CORE0_CPU_INT_THRESH_REG) = state;
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/* small delay needed here */
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__asm__ volatile ( "nop" );
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__asm__ volatile ( "nop" );
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__asm__ volatile ( "nop" );
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DEBUG("%s %02x(%02x)\n", __func__, (unsigned)state, (unsigned)old);
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}
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/**
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* @brief Test if IRQs are currently enabled
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*/
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bool IRAM_ATTR irq_is_enabled(void)
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{
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return *((volatile uint32_t *)INTERRUPT_CORE0_CPU_INT_THRESH_REG) == 0;
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}
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