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4a0c462ec3
This provides basic GPIO LL support. IRQ support will be added as follow up.
99 lines
2.5 KiB
C
99 lines
2.5 KiB
C
/*
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* Copyright (C) 2021 Otto-von-Guericke-Universität Magdeburg
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief GPIO LL CPU definitions for the STM32 family
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*
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* @author Marian Buschsieweke <marian.buschsieweke@ovgu.de>
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*/
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#ifndef PERIPH_CPU_GPIO_LL_H
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#define PERIPH_CPU_GPIO_LL_H
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#include <stdint.h>
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Hide this from Doxygen to avoid merging implementation details into
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* public view on type */
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#ifndef DOXYGEN
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#define HAVE_GPIO_PULL_STRENGTH_T
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typedef enum {
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GPIO_PULL_WEAKEST = 0,
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GPIO_PULL_WEAK = 0,
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GPIO_PULL_STRONG = 0,
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GPIO_PULL_STRONGEST = 0
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} gpio_pull_strength_t;
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#define HAVE_GPIO_DRIVE_STRENGTH_T
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typedef enum {
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GPIO_DRIVE_WEAKEST = 0,
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GPIO_DRIVE_WEAK = 0,
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GPIO_DRIVE_STRONG = 0,
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GPIO_DRIVE_STRONGEST = 0
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} gpio_drive_strength_t;
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#if defined(GPIO_OSPEEDR_OSPEED0) || defined(GPIO_OSPEEDER_OSPEEDR0) \
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|| defined(GPIO_OSPEEDER_OSPEED0) || defined(GPIO_OSPEEDR_OSPEEDR0)
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/* Modern STM32 GPIO config registers with the OSPEEDR register support full
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* 4 slew rates, legacy STM32F1 style only have three slew rates. We define
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* slow and fast to the same value, so that we have three options:
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* 1. SLOWEST: 2 MHZ
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* 2. SLOW: 10 MHZ
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* 3. FAST/FASTEST: 50 MHz
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*/
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#define HAVE_GPIO_SLEW_T
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typedef enum {
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GPIO_SLEW_SLOWEST = 0,
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GPIO_SLEW_SLOW = 1,
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GPIO_SLEW_FAST = 2,
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GPIO_SLEW_FASTEST = 2,
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} gpio_slew_t;
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#endif
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#define HAVE_GPIO_IRQ_TRIG_T
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/*
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* Layout:
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* 7 6 5 4 3 2 1 0
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* +-+-+-+-+-+-+-+-+
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* | RFU |T|L|H|
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* +-+-+-+-+-+-+-+-+
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*
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* RFU = Reserved for future use
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* T = Trigger mode (1 = Level triggered, 0 = Edge triggered)
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* L = Low (1 = low level / falling edge)
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* H = High (1 = high level / rising edge)
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*
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* Note: This layout overlaps with gpio_flank_t by intent
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*/
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typedef enum {
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GPIO_TRIGGER_EDGE_RISING = 0x1,
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GPIO_TRIGGER_EDGE_FALLING = 0x2,
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GPIO_TRIGGER_EDGE_BOTH = GPIO_TRIGGER_EDGE_RISING | GPIO_TRIGGER_EDGE_FALLING,
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GPIO_TRIGGER_LEVEL = 0x4,
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GPIO_TRIGGER_LEVEL_HIGH = GPIO_TRIGGER_LEVEL | GPIO_TRIGGER_EDGE_RISING,
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GPIO_TRIGGER_LEVEL_LOW = GPIO_TRIGGER_LEVEL | GPIO_TRIGGER_EDGE_FALLING,
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} gpio_irq_trig_t;
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#endif /* ndef Doxygen */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_GPIO_LL_H */
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/** @} */
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