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422042bd00
The assumption that every MCU has this feature turned out wrong. Hence, add a feature to allow testing for support of edge triggered IRQs on both flanks.
28 lines
1.0 KiB
Makefile
28 lines
1.0 KiB
Makefile
CPU_CORE := rv32imac
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FEATURES_PROVIDED += arch_nuclei
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FEATURES_PROVIDED += periph_clic
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_gpio_irq
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FEATURES_PROVIDED += periph_gpio_ll
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FEATURES_PROVIDED += periph_gpio_ll_disconnect
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FEATURES_PROVIDED += periph_gpio_ll_input_pull_down
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FEATURES_PROVIDED += periph_gpio_ll_input_pull_up
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FEATURES_PROVIDED += periph_gpio_ll_irq
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FEATURES_PROVIDED += periph_gpio_ll_irq_edge_triggered_both
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FEATURES_PROVIDED += periph_gpio_ll_irq_level_triggered_high
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FEATURES_PROVIDED += periph_gpio_ll_irq_level_triggered_low
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FEATURES_PROVIDED += periph_gpio_ll_open_drain
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FEATURES_PROVIDED += periph_rtc
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FEATURES_PROVIDED += periph_rtc_mem
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_timer_periodic
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FEATURES_PROVIDED += periph_wdt
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FEATURES_PROVIDED += periph_pm
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_flashpage_in_address_space
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FEATURES_PROVIDED += periph_flashpage_pagewise
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include $(RIOTCPU)/riscv_common/Makefile.features
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