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RIOT/boards/stm32f4discovery/include/periph_conf.h
2022-02-21 10:49:43 +01:00

262 lines
6.5 KiB
C

/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_stm32f4discovery
* @{
*
* @file
* @name Peripheral MCU configuration for the STM32F4discovery board
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Peter Kietzmann <peter.kietzmann@haw-hamburg.de>
*/
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H
/* This board provides an HSE */
#ifndef CONFIG_BOARD_HAS_HSE
#define CONFIG_BOARD_HAS_HSE 1
#endif
#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_usb_otg_fs.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name DMA streams configuration
* @{
*/
static const dma_conf_t dma_config[] = {
{ .stream = 11 }, /* DMA2 Stream 3 - SPI1_TX */
{ .stream = 10 }, /* DMA2 Stream 2 - SPI1_RX */
{ .stream = 4 }, /* DMA1 Stream 4 - SPI2_TX */
{ .stream = 3 }, /* DMA1 Stream 3 - SPI2_RX */
};
#define DMA_0_ISR isr_dma2_stream3
#define DMA_1_ISR isr_dma2_stream2
#define DMA_2_ISR isr_dma1_stream4
#define DMA_3_ISR isr_dma1_stream3
#define DMA_NUMOF ARRAY_SIZE(dma_config)
/** @} */
/**
* @name Timer configuration
* @{
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_1_ISR isr_tim5
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
/** @} */
/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn,
#ifdef MODULE_PERIPH_DMA
.dma = DMA_STREAM_UNDEF,
.dma_chan = UINT8_MAX,
#endif
},
{
.dev = USART3,
.rcc_mask = RCC_APB1ENR_USART3EN,
.rx_pin = GPIO_PIN(PORT_D, 9),
.tx_pin = GPIO_PIN(PORT_D, 8),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART3_IRQn,
#ifdef MODULE_PERIPH_DMA
.dma = DMA_STREAM_UNDEF,
.dma_chan = UINT8_MAX,
#endif
}
};
#define UART_0_ISR (isr_usart2)
#define UART_1_ISR (isr_usart3)
#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */
/**
* @name ADC configuration
*
* We need to define the following fields:
* PIN, device (ADCx), channel
* @{
*/
static const adc_conf_t adc_config[] = {
{GPIO_PIN(PORT_A, 1), 0, 1},
{GPIO_PIN(PORT_A, 4), 0, 4},
{GPIO_PIN(PORT_C, 1), 1, 11},
{GPIO_PIN(PORT_C, 2), 1, 12},
{GPIO_UNDEF, 0, 18}, /* VBAT */
};
#define VBAT_ADC ADC_LINE(4) /**< VBAT ADC line */
#define ADC_NUMOF ARRAY_SIZE(adc_config)
/** @} */
/**
* @name DAC configuration
* @{
*/
static const dac_conf_t dac_config[] = {
{ .pin = GPIO_PIN(PORT_A, 4), .chan = 0 },
{ .pin = GPIO_PIN(PORT_A, 5), .chan = 1 }
};
#define DAC_NUMOF ARRAY_SIZE(dac_config)
/** @} */
/**
* @name PWM configuration
* @{
*/
static const pwm_conf_t pwm_config[] = {
{
.dev = TIM1,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.chan = { { .pin = GPIO_PIN(PORT_E, 9), .cc_chan = 0 },
{ .pin = GPIO_PIN(PORT_E, 11), .cc_chan = 1 },
{ .pin = GPIO_PIN(PORT_E, 11), .cc_chan = 2 },
{ .pin = GPIO_PIN(PORT_E, 14), .cc_chan = 3 } },
.af = GPIO_AF1,
.bus = APB2
},
{
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.chan = { { .pin = GPIO_PIN(PORT_B, 4), .cc_chan = 0 },
{ .pin = GPIO_PIN(PORT_B, 5), .cc_chan = 1 },
{ .pin = GPIO_PIN(PORT_B, 0), .cc_chan = 2 },
{ .pin = GPIO_PIN(PORT_B, 1), .cc_chan = 3 } },
.af = GPIO_AF2,
.bus = APB1
}
};
#define PWM_NUMOF ARRAY_SIZE(pwm_config)
/** @} */
/**
* @name SPI configuration
* @{
*/
static const spi_conf_t spi_config[] = {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
#ifdef MODULE_PERIPH_DMA
.tx_dma = 0,
.tx_dma_chan = 3,
.rx_dma = 1,
.rx_dma_chan = 3,
#endif
},
{
.dev = SPI2,
.mosi_pin = GPIO_PIN(PORT_B, 15),
.miso_pin = GPIO_PIN(PORT_B, 14),
.sclk_pin = GPIO_PIN(PORT_B, 13),
.cs_pin = GPIO_PIN(PORT_B, 12),
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB1ENR_SPI2EN,
.apbbus = APB1,
#ifdef MODULE_PERIPH_DMA
.tx_dma = 2,
.tx_dma_chan = 0,
.rx_dma = 3,
.rx_dma_chan = 0,
#endif
},
};
#define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */
/**
* @name I2C configuration
* @{
*/
static const i2c_conf_t i2c_config[] = {
{
.dev = I2C1,
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PORT_B, 6),
.sda_pin = GPIO_PIN(PORT_B, 9),
.scl_af = GPIO_AF4,
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR_I2C1EN,
.clk = CLOCK_APB1,
.irqn = I2C1_EV_IRQn
}
};
#define I2C_0_ISR isr_i2c1_ev
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CONF_H */
/** @} */