mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
147 lines
2.9 KiB
C
147 lines
2.9 KiB
C
/*
|
|
* Copyright (C) 2017 Bas Stottelaar <basstottelaar@gmail.com>
|
|
*
|
|
* This file is subject to the terms and conditions of the GNU Lesser
|
|
* General Public License v2.1. See the file LICENSE in the top level
|
|
* directory for more details.
|
|
*/
|
|
|
|
/**
|
|
* @ingroup boards_ikea-tradfri
|
|
* @{
|
|
*
|
|
* @file
|
|
* @brief Configuration of CPU peripherals for the IKEA TRÅDFRI modules
|
|
*
|
|
* @author Bas Stottelaar <basstottelaar@gmail.com>
|
|
*/
|
|
|
|
#ifndef PERIPH_CONF_H
|
|
#define PERIPH_CONF_H
|
|
|
|
#include "cpu.h"
|
|
#include "periph_cpu.h"
|
|
#include "em_cmu.h"
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
|
|
/**
|
|
* @brief Internal macro to calculate *_NUMOF based on config.
|
|
*/
|
|
#define PERIPH_NUMOF(config) (sizeof(config) / sizeof(config[0]))
|
|
|
|
/**
|
|
* @name Clock configuration
|
|
* @{
|
|
*/
|
|
#ifndef CLOCK_HF
|
|
#define CLOCK_HF cmuSelect_HFRCO
|
|
#endif
|
|
#ifndef CLOCK_CORE_DIV
|
|
#define CLOCK_CORE_DIV cmuClkDiv_1
|
|
#endif
|
|
#ifndef CLOCK_LFA
|
|
#define CLOCK_LFA cmuSelect_LFRCO
|
|
#endif
|
|
#ifndef CLOCK_LFB
|
|
#define CLOCK_LFB cmuSelect_LFRCO
|
|
#endif
|
|
#ifndef CLOCK_LFE
|
|
#define CLOCK_LFE cmuSelect_LFRCO
|
|
#endif
|
|
/** @} */
|
|
|
|
/**
|
|
* @name RTC configuration
|
|
* @{
|
|
*/
|
|
#define RTC_NUMOF (1U)
|
|
/** @} */
|
|
|
|
/**
|
|
* @name RTT configuration
|
|
* @{
|
|
*/
|
|
#define RTT_NUMOF (1U)
|
|
|
|
#define RTT_MAX_VALUE (0xFFFFFFFF)
|
|
#define RTT_FREQUENCY (1U)
|
|
/** @} */
|
|
|
|
/**
|
|
* @name SPI configuration
|
|
* @{
|
|
*/
|
|
static const spi_dev_t spi_config[] = {
|
|
{
|
|
.dev = USART1,
|
|
.mosi_pin = GPIO_PIN(PD, 15),
|
|
.miso_pin = GPIO_PIN(PD, 14),
|
|
.clk_pin = GPIO_PIN(PD, 13),
|
|
.loc = USART_ROUTELOC0_RXLOC_LOC21 |
|
|
USART_ROUTELOC0_TXLOC_LOC23 |
|
|
USART_ROUTELOC0_CLKLOC_LOC19,
|
|
.cmu = cmuClock_USART1,
|
|
.irq = USART1_RX_IRQn
|
|
}
|
|
};
|
|
|
|
#define SPI_NUMOF PERIPH_NUMOF(spi_config)
|
|
/** @} */
|
|
|
|
/**
|
|
* @name Timer configuration
|
|
*
|
|
* The implementation uses two timers in cascade mode.
|
|
* @{
|
|
*/
|
|
static const timer_conf_t timer_config[] = {
|
|
{
|
|
{
|
|
.dev = TIMER0,
|
|
.cmu = cmuClock_TIMER0
|
|
},
|
|
{
|
|
.dev = TIMER1,
|
|
.cmu = cmuClock_TIMER1
|
|
},
|
|
.irq = TIMER1_IRQn
|
|
}
|
|
};
|
|
|
|
#define TIMER_NUMOF PERIPH_NUMOF(timer_config)
|
|
#define TIMER_0_ISR isr_timer1
|
|
/** @} */
|
|
|
|
/**
|
|
* @name UART configuration
|
|
* @{
|
|
*/
|
|
static const uart_conf_t uart_config[] = {
|
|
{
|
|
.dev = USART0,
|
|
.rx_pin = GPIO_PIN(PB, 15),
|
|
.tx_pin = GPIO_PIN(PB, 14),
|
|
.loc = USART_ROUTELOC0_RXLOC_LOC9 |
|
|
USART_ROUTELOC0_TXLOC_LOC9,
|
|
#if EFM32_UART_MODES
|
|
.mode = UART_MODE_8N1,
|
|
#endif
|
|
.cmu = cmuClock_USART0,
|
|
.irq = USART0_RX_IRQn
|
|
}
|
|
};
|
|
|
|
#define UART_NUMOF PERIPH_NUMOF(uart_config)
|
|
#define UART_0_ISR_RX isr_usart0_rx
|
|
/** @} */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* PERIPH_CONF_H */
|
|
/** @} */
|