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57 lines
1.5 KiB
Makefile
57 lines
1.5 KiB
Makefile
BOARD ?= nucleo-f767zi
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# Custom per-board pin configuration (e.g. for setting PORT_IN, PIN_IN_0, ...)
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# can be provided in a Makefile.$(BOARD) file:
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-include Makefile.$(BOARD)
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# Choose two input pins and two pins that do not conflict with stdio. All four
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# *can* be on the same GPIO port, but the two output pins and the two inputs
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# pins *must* be on the same port, respectively. Connect the first input to the
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# first output pin and the second input pin to the second output pin, e.g. using
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# jumper wires.
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PORT_IN ?= 1
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PORT_OUT ?= 0
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PIN_IN_0 ?= 0
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PIN_IN_1 ?= 1
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PIN_OUT_0 ?= 0
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PIN_OUT_1 ?= 1
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# Boards that require tweaking for low ROM
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LOW_ROM_BOARDS := \
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nucleo-l011k4 \
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stm32f030f4-demo \
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#
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ifneq (,$(filter $(BOARD),$(LOW_ROM_BOARDS)))
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LOW_ROM ?= 1
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endif
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LOW_ROM ?= 0
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include ../Makefile.periph_common
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FEATURES_REQUIRED += periph_gpio_ll
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FEATURES_OPTIONAL += periph_gpio_ll_irq
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FEATURES_OPTIONAL += periph_gpio_ll_irq_level_triggered_high
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FEATURES_OPTIONAL += periph_gpio_ll_irq_level_triggered_low
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USEMODULE += ztimer_usec
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include $(RIOTBASE)/Makefile.include
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CFLAGS += -DPORT_OUT=$(PORT_OUT)
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CFLAGS += -DPORT_IN=$(PORT_IN)
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CFLAGS += -DPIN_IN_0=$(PIN_IN_0)
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CFLAGS += -DPIN_IN_1=$(PIN_IN_1)
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CFLAGS += -DPIN_OUT_0=$(PIN_OUT_0)
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CFLAGS += -DPIN_OUT_1=$(PIN_OUT_1)
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CFLAGS += -DLOW_ROM=$(LOW_ROM)
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ifneq ($(MCU),esp32)
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# We only need 1 thread (+ the Idle thread on some platforms) and we really
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# want this app working on all boards.
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CFLAGS += -DMAXTHREADS=2
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else
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# ESP32x SoCs uses an extra thread for esp_timer
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CFLAGS += -DMAXTHREADS=3
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endif
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