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35 lines
1.4 KiB
Diff
35 lines
1.4 KiB
Diff
From a1f56254e32ae0546c9f9b56dc5471718abd9bf7 Mon Sep 17 00:00:00 2001
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From: Gunar Schorcht <gunar@schorcht.net>
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Date: Fri, 9 Sep 2022 14:56:17 +0200
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Subject: [PATCH 2/2] src/portable/synopsys: define SystemCoreClock variable
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DWC2 for STM32 uses the `SystemCoreClock` variable from CMSIS which is usually declared/defined in `system_stm32fxxx.{h,c}`and set when function SystemCoreClockUpdate is called. Since RIOT explicitely excludes these files, the variable is neither declared nor defined nor set correctly. Therefore, it is defined in `dwc2_stm32` and set to RIOT's `CLOCK_CORECLOCK` define.
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---
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src/portable/synopsys/dwc2/dwc2_stm32.h | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
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index cb455bd9..9564f879 100644
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--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
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+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
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@@ -99,6 +99,8 @@
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#define DWC2_EP_MAX EP_MAX_FS
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#endif
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+#include "clk_conf.h"
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+
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// On STM32 for consistency we associate
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// - Port0 to OTG_FS, and Port1 to OTG_HS
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static const dwc2_controller_t _dwc2_controller[] =
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@@ -118,6 +120,7 @@ static const dwc2_controller_t _dwc2_controller[] =
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// SystemCoreClock is already included by family header
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// extern uint32_t SystemCoreClock;
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+static uint32_t SystemCoreClock = CLOCK_CORECLOCK;
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TU_ATTR_ALWAYS_INLINE
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static inline void dwc2_dcd_int_enable(uint8_t rhport)
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--
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2.37.2
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