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https://github.com/RIOT-OS/RIOT.git
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f7a77ebb04
The driver uses the netdev interface. Due to the limited capabilities of the transceiver (32 byte FIFO and no source address in the layer2 frame), it relies on 6LowPAN compression and adds the source address to the frame for that.
151 lines
3.9 KiB
C
151 lines
3.9 KiB
C
/*
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* Copyright (C) 2019 Otto-von-Guericke-Universität Magdeburg
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup drivers_nrf24l01p_ng
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* @{
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*
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* @file
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* @brief Board specific configuration for all NRF24L01+ (NG) devices
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*
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* @author Fabian Hüßler <fabian.huessler@ovgu.de>
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*/
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#ifndef NRF24L01P_NG_PARAMS_H
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#define NRF24L01P_NG_PARAMS_H
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#include "board.h"
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#include "periph/gpio.h"
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#include "periph/spi.h"
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#include "kernel_defines.h"
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#include "nrf24l01p_ng_constants.h"
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#include "nrf24l01p_ng.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef NRF24L01P_NG_PARAM_SPI
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/**
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* @brief SPI bus
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*/
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#define NRF24L01P_NG_PARAM_SPI SPI_DEV(0)
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#endif
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#ifndef NRF24L01P_NG_PARAM_SPI_CLK
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/**
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* @brief SPI clock speed
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*/
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#define NRF24L01P_NG_PARAM_SPI_CLK SPI_CLK_5MHZ
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#endif
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#ifndef NRF24L01P_NG_PARAM_CS
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/**
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* @brief SPI CS gpio pin
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*/
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#define NRF24L01P_NG_PARAM_CS GPIO_UNDEF
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#endif
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#ifndef NRF24L01P_NG_PARAM_CE
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/**
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* @brief NRF24L01+ chip enable gpio pin
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*/
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#define NRF24L01P_NG_PARAM_CE GPIO_UNDEF
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#endif
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#ifndef NRF24L01P_NG_PARAM_IRQ
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/**
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* @brief NRF24L01+ interrupt gpio pin
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*/
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#define NRF24L01P_NG_PARAM_IRQ GPIO_UNDEF
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#endif
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#ifndef NRF24L01P_NG_PARAM_CRC_LEN
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/**
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* @brief Default CRC length
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* @see nrf24l01p_ng_crc_t
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*/
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#define NRF24L01P_NG_PARAM_CRC_LEN (NRF24L01P_NG_CRC_2BYTE)
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#endif
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#ifndef NRF24L01P_NG_PARAM_TX_POWER
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/**
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* @brief Default TX power
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* @see nrf24l01p_ng_tx_power_t
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*/
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#define NRF24L01P_NG_PARAM_TX_POWER (NRF24L01P_NG_TX_POWER_0DBM)
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#endif
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#ifndef NRF24L01P_NG_PARAM_DATA_RATE_LVL
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/**
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* @brief Default data rate
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* @see nrf24l01p_ng_rfdr_t
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*/
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#define NRF24L01P_NG_PARAM_DATA_RATE (NRF24L01P_NG_RF_DR_2MBPS)
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#endif
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#ifndef NRF24L01P_NG_PARAM_CHANNEL
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/**
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* @brief Default channel in [0; 124]
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*/
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#define NRF24L01P_NG_PARAM_CHANNEL (4)
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#endif
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#ifndef NRF24L01P_NG_PARAM_MAX_RETRANSM
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/**
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* @brief Default number of retransmissions
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*/
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#define NRF24L01P_NG_PARAM_MAX_RETRANSM (5)
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#endif
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#ifndef NRF24L01P_NG_PARAM_RETRANSM_DELAY
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/**
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* @brief Default retransmission delay
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* @see nrf24l01p_ng_ard_t
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*/
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#define NRF24L01P_NG_PARAM_RETRANSM_DELAY (NRF24L01P_NG_ARD_2750US)
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#endif
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#ifndef NRF24L01P_NG_PARAMS
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/**
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* @brief Default NRF24L01+ device parameters
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*/
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#define NRF24L01P_NG_PARAMS { \
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.spi = NRF24L01P_NG_PARAM_SPI, \
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.spi_clk = NRF24L01P_NG_PARAM_SPI_CLK, \
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.pin_cs = NRF24L01P_NG_PARAM_CS, \
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.pin_ce = NRF24L01P_NG_PARAM_CE, \
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.pin_irq = NRF24L01P_NG_PARAM_IRQ, \
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.config = { \
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.cfg_crc = NRF24L01P_NG_PARAM_CRC_LEN, \
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.cfg_tx_power = NRF24L01P_NG_PARAM_TX_POWER, \
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.cfg_data_rate = NRF24L01P_NG_PARAM_DATA_RATE, \
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.cfg_channel = NRF24L01P_NG_PARAM_CHANNEL, \
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.cfg_max_retr = NRF24L01P_NG_PARAM_MAX_RETRANSM, \
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.cfg_retr_delay = NRF24L01P_NG_PARAM_RETRANSM_DELAY, \
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} \
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}
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#endif
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/**
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* @brief Static array that holds NRF24L01+ device configurations
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*/
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static const nrf24l01p_ng_params_t nrf24l01p_ng_params[] = {
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NRF24L01P_NG_PARAMS
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};
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/**
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* @brief Number of NRF24L01+ device configurations
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*/
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#define NRF24L01P_NG_NUM ARRAY_SIZE(nrf24l01p_ng_params)
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#ifdef __cplusplus
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}
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#endif
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#endif /* NRF24L01P_NG_PARAMS_H */
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/** @} */
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