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231 lines
6.0 KiB
C
231 lines
6.0 KiB
C
/*
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* Copyright (C) 2014 PHYTEC Messtechnik GmbH
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* 2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*
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*/
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/**
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* @ingroup drivers_mma8x5x
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* @{
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*
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* @file
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* @brief Driver for the Freescale MMA8x5x accelerometer family
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*
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* @author Johann Fischer <j.fischer@phytec.de>
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* @author Peter Kietzmann <peter.kietzmann@haw-hamburg.de>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include "assert.h"
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#include "periph/i2c.h"
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#include "mma8x5x.h"
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#include "mma8x5x_regs.h"
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#define ENABLE_DEBUG 0
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#include "debug.h"
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#define BUS (dev->params.i2c)
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#define ADDR (dev->params.addr)
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int mma8x5x_init(mma8x5x_t *dev, const mma8x5x_params_t *params)
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{
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uint8_t reg = 0;
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assert(dev && params);
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/* write device descriptor */
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dev->params = *params;
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/* acquire the I2C bus */
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i2c_acquire(BUS);
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/* test if the target device responds */
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i2c_read_reg(BUS, ADDR, MMA8X5X_WHO_AM_I, ®, 0);
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switch (reg) {
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case MMA8X5X_TYPE_MMA8451:
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case MMA8X5X_TYPE_MMA8452:
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case MMA8X5X_TYPE_MMA8453:
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case MMA8X5X_TYPE_MMA8652:
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case MMA8X5X_TYPE_MMA8653:
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break;
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default: /* invalid device type */
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i2c_release(BUS);
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DEBUG("[mma8x5x] init - error: invalid WHO_AM_I value [0x%02x]\n",
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(int)reg);
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return MMA8X5X_NODEV;
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}
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/* reset the device */
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i2c_write_reg(BUS, ADDR, MMA8X5X_CTRL_REG2, MMA8X5X_CTRL_REG2_RST, 0);
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do {
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i2c_read_reg(BUS, ADDR, MMA8X5X_CTRL_REG2, ®, 0);
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} while (reg & MMA8X5X_CTRL_REG2_RST);
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/* configure the user offset */
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i2c_write_regs(BUS, ADDR, MMA8X5X_OFF_X, dev->params.offset, 3, 0);
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/* configure range, rate, and activate the device */
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reg = (dev->params.range & MMA8X5X_XYZ_DATA_CFG_FS_MASK);
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i2c_write_reg(BUS, ADDR, MMA8X5X_XYZ_DATA_CFG, reg, 0);
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reg = ((dev->params.rate & MMA8X5X_CTRL_REG1_DR_MASK) |
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MMA8X5X_CTRL_REG1_ACTIVE);
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i2c_write_reg(BUS, ADDR, MMA8X5X_CTRL_REG1, reg, 0);
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/* finally release the bus */
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i2c_release(BUS);
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DEBUG("[mma8x5x] init: successful\n");
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return MMA8X5X_OK;
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}
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void mma8x5x_set_user_offset(const mma8x5x_t *dev, int8_t x, int8_t y, int8_t z)
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{
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uint8_t buf[3];
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assert(dev);
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buf[0] = (uint8_t)x;
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buf[1] = (uint8_t)y;
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buf[2] = (uint8_t)z;
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DEBUG("[mma8x5x] setting user offset to X: %3i, Y: %3i, Z: %3i\n",
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(int)x, (int)y, (int)z);
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i2c_acquire(BUS);
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i2c_write_regs(BUS, ADDR, MMA8X5X_OFF_X, buf, 3, 0);
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i2c_release(BUS);
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}
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static int _get_reg(const mma8x5x_t *dev, uint8_t addr)
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{
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uint8_t reg;
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assert(dev);
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DEBUG("[mma8x5x] getting reg 0x%02x\n", (unsigned)addr);
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i2c_acquire(BUS);
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i2c_read_reg(BUS, ADDR, addr, ®, 0);
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i2c_release(BUS);
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DEBUG("[mma8x5x] reg 0x%02x=0x%02x\n", (unsigned)addr, (unsigned)reg);
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return reg;
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}
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static void _reg_setbits(const mma8x5x_t *dev, uint8_t reg, uint8_t val)
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{
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uint8_t tmp;
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assert(dev);
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i2c_acquire(BUS);
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i2c_read_reg(BUS, ADDR, reg, &tmp, 0);
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DEBUG("[mma8x5x] 0x%02x: 0x%02x | 0x%02x = 0x%02x\n",
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(unsigned)reg, (unsigned)tmp, (unsigned)val, (unsigned) tmp | val);
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tmp |= val;
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i2c_write_reg(BUS, ADDR, reg, tmp, 0);
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i2c_release(BUS);
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}
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static void _reg_clearbits(const mma8x5x_t *dev, uint8_t reg, uint8_t val)
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{
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uint8_t tmp;
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assert(dev);
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i2c_acquire(BUS);
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i2c_read_reg(BUS, ADDR, reg, &tmp, 0);
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DEBUG("[mma8x5x] 0x%02x: 0x%02x &= ~0x%02x = 0x%02x\n",
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(unsigned)reg, (unsigned)tmp, (unsigned)val, (unsigned) tmp & ~val);
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tmp &= ~val;
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i2c_write_reg(BUS, ADDR, reg, tmp, 0);
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i2c_release(BUS);
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}
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void mma8x5x_set_active(const mma8x5x_t *dev)
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{
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DEBUG("[mma8x5x] put device to active mode\n");
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_reg_setbits(dev, MMA8X5X_CTRL_REG1, MMA8X5X_CTRL_REG1_ACTIVE);
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}
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void mma8x5x_set_standby(const mma8x5x_t *dev)
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{
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DEBUG("[mma8x5x] put device to standby mode\n");
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_reg_clearbits(dev, MMA8X5X_CTRL_REG1, MMA8X5X_CTRL_REG1_ACTIVE);
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}
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void mma8x5x_set_motiondetect(const mma8x5x_t *dev, uint8_t int_pin, uint8_t threshold)
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{
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DEBUG("[mma8x5x] put device to motion detect mode (ELE=1, OAE=1)\n");
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assert(int_pin < 3);
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mma8x5x_set_standby(dev);
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_reg_setbits(dev, MMA8X5X_FF_MT_CFG, \
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MMA8X5X_FF_MT_CFG_XEFE | \
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MMA8X5X_FF_MT_CFG_YEFE | \
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MMA8X5X_FF_MT_CFG_ZEFE | \
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MMA8X5X_FF_MT_CFG_OAE | MMA8X5X_FF_MT_CFG_ELE);
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switch(int_pin) {
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case 0:
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_reg_clearbits(dev, MMA8X5X_CTRL_REG4, MMA8X5X_CTRL_REG4_INT_EN_FF_MT);
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goto out;
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case 1:
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_reg_setbits(dev, MMA8X5X_CTRL_REG5, MMA8X5X_CTRL_REG5_INT_CFG_FF_MT);
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break;
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case 2:
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_reg_clearbits(dev, MMA8X5X_CTRL_REG5, MMA8X5X_CTRL_REG5_INT_CFG_FF_MT);
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break;
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}
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_reg_setbits(dev, MMA8X5X_FF_MT_THS, threshold & 0x7f);
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_reg_setbits(dev, MMA8X5X_CTRL_REG4, MMA8X5X_CTRL_REG4_INT_EN_FF_MT);
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out:
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mma8x5x_set_active(dev);
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}
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void mma8x5x_ack_int(const mma8x5x_t *dev)
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{
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_get_reg(dev, MMA8X5X_FF_MT_SRC);
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}
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int mma8x5x_is_ready(const mma8x5x_t *dev)
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{
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DEBUG("[mma8x5x] checking for new available data\n");
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uint8_t reg = _get_reg(dev, MMA8X5X_STATUS);
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if (reg & MMA8X5X_STATUS_ZYXDR) {
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return MMA8X5X_DATA_READY;
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}
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else {
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return MMA8X5X_NODATA;
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}
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}
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void mma8x5x_read(const mma8x5x_t *dev, mma8x5x_data_t *data)
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{
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uint8_t buf[7];
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assert(dev);
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i2c_acquire(BUS);
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i2c_read_regs(BUS, ADDR, MMA8X5X_STATUS, buf, 7, 0);
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i2c_release(BUS);
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data->x = ((int16_t)(buf[1] << 8 | buf[2])) / (16 >> dev->params.range);
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data->y = ((int16_t)(buf[3] << 8 | buf[4])) / (16 >> dev->params.range);
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data->z = ((int16_t)(buf[5] << 8 | buf[6])) / (16 >> dev->params.range);
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}
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