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210 lines
8.0 KiB
C
210 lines
8.0 KiB
C
/*
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* Copyright (C) 2020 Otto-von-Guericke-Universität Magdeburg
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @defgroup drivers_mii Ethernet Media-Independent Interface (MII)
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* Utilities
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* @ingroup drivers_netdev
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*
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* This module contains constants and helpers as library to help working with
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* Ethernet PHYs connected via the Media-Independent Interface (MII) or the
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* Reduced Media-Independent Interface (RMII)
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*
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* @{
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*
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* @file
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* @brief Interface definition for MII/RMII h
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*
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* @author Marian Buschsieweke <marian.buschsieweke@ovgu.de>
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*/
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#ifndef MII_H
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#define MII_H
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#include <stdbool.h>
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#include <stdint.h>
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#include "bitarithm.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Common MII Management Register Set
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*
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* All registers except @ref MII_BMCR and @ref MII_BMSR are extended registers.
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* Support for extended registers is indicated by the @ref MII_BMSR_EXTENDED
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* bit in the @ref MII_BMSR register.
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*
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* @{
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*/
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#define MII_BMCR (0x00U) /**< Basic mode control register */
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#define MII_BMSR (0x01U) /**< Basic mode status register */
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#define MII_PHYID1 (0x02U) /**< PHY Identifier 1 */
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#define MII_PHYID2 (0x03U) /**< PHY Identifier 2 */
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#define MII_ADVERTISE (0x04U) /**< Auto-Negotiation Advertisement */
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#define MII_LPA (0x05U) /**< Link Parter Abilities */
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#define MII_EXPANSION (0x06U) /**< Auto-Negotiation Expansion */
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#define MII_ESTATUS (0x0fU) /**< Extended Status Register */
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#define MII_IRQ (0x1bU) /**< Interrupt Control/Status */
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/** @} */
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/**
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* @name Bits in the MII Basic Mode Control Register
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* @{
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*/
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#define MII_BMCR_RESET BIT15 /**< Set to perform PHY reset */
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#define MII_BMCR_LOOP BIT14 /**< Set to enable loopback mode */
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#define MII_BMCR_AN_ENABLE BIT12 /**< Set to enable auto-negotiation */
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#define MII_BMCR_POWER_DOWN BIT11 /**< Set to power down PHY */
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#define MII_BMCR_ISOLATE BIT10 /**< Set to electrically isolate PHY from
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MII (PHY becomes inoperational) */
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#define MII_BMCR_AN_RESTART BIT9 /**< Set to restart auto-negotiation */
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#define MII_BMCR_FULL_DPLX BIT8 /**< Set for full duplex */
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#define MII_BMCR_HALF_DPLX (0) /**< Set for half duplex */
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#define MII_BMCR_COLL_TEST BIT7 /**< Set to enable collision signal test */
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#define MII_BMCR_SPEED_10 (0) /**< Set speed to 10 Mbps */
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#define MII_BMCR_SPEED_100 BIT13 /**< Set speed to 100 Mbps */
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#define MII_BMCR_SPEED_1000 BIT6 /**< Set speed to 1 Gbps */
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/** @} */
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/**
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* @name Bits in the MII Basic Mode Status Register
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* @{
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*/
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#define MII_BMSR_100_T4 BIT15 /**< PHY supports 100BASE-T4 (half-duplex) */
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#define MII_BMSR_100_TX_F BIT14 /**< PHY supports 100BASE-TX, full duplex */
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#define MII_BMSR_100_TX_H BIT13 /**< PHY supports 100BASE-TX, half duplex */
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#define MII_BMSR_10_F BIT12 /**< PHY supports 10BASE-T, full duplex */
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#define MII_BMSR_10_H BIT11 /**< PHY supports 10BASE-T, half duplex */
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#define MII_BMSR_100_T2_F BIT10 /**< PHY supports 100BASE-T2, full duplex */
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#define MII_BMSR_100_T2_H BIT9 /**< PHY supports 100BASE-T2, half duplex */
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#define MII_BMSR_ESTATUS BIT8 /**< Set, if @ref MII_ESTATUS is
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available */
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#define MII_BMSR_AN_DONE BIT5 /**< Set when auto-negotiation is done */
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#define MII_BMSR_FAULT BIT4 /**< Set when remote fault condition
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is detected */
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#define MII_BMSR_HAS_AN BIT3 /**< Set if PHY can auto-negotiate */
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#define MII_BMSR_LINK BIT2 /**< Set if link is up */
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#define MII_BMSR_JABBER BIT1 /**< Set when jabber condition detected */
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#define MII_BMSR_EXTENDED BIT0 /**< Extended MII registers available */
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/** @} */
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/**
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* @name Bits in the MII Extended Mode Advertisement Register
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* @{
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*/
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#define MII_ADVERTISE_100_F BIT8 /**< Advertise 100BASE-T, full duplex */
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#define MII_ADVERTISE_100_H BIT7 /**< Advertise 100BASE-T, half duplex */
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#define MII_ADVERTISE_10_F BIT6 /**< Advertise 10BASE-T, full duplex */
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#define MII_ADVERTISE_10_H BIT5 /**< Advertise 10BASE-T, half duplex */
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#define MII_ADVERTISE_100 (BIT7 | BIT8) /**< Advertise 100BASE-T */
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#define MII_ADVERTISE_10 (BIT5 | BIT6) /**< Advertise 10BASE-T */
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/** @} */
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/**
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* @name Bits in the MII Extended Mode Advertisement Register
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* @{
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*/
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#define MII_LPA_100_F BIT8 /**< Partner can 100BASE-T, full duplex */
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#define MII_LPA_100_H BIT7 /**< Partner can 100BASE-T, half duplex */
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#define MII_LPA_10_F BIT6 /**< Partner can 10BASE-T, full duplex */
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#define MII_LPA_10_H BIT5 /**< Partner can 10BASE-T, half duplex */
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#define MII_LPA_100 (BIT7 | BIT8) /**< Partner can 100BASE-T */
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#define MII_LPA_10 (BIT5 | BIT6) /**< Partner can 10BASE-T */
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/** @} */
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/**
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* @name Bits in the MII Auto-Negotiation Expansion Register
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* @{
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*/
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#define MII_LPA_HAS_AN BIT0 /**< Partner can auto-negotiate */
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/** @} */
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/**
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* @name Bits in the MII Interrupt Control/Status Register
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* @{
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*/
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#define MII_IRQ_LINK_UP BIT0 /**< Link-up occurred */
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#define MII_IRQ_RMT_FAULT BIT1 /**< Remote fault occurred */
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#define MII_IRQ_LINK_DOWN BIT2 /**< Link-down occurred */
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#define MII_IRQ_LPA_ACK BIT3 /**< Link partner acknowledge occurred */
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#define MII_IRQ_PD_FAULT BIT4 /**< Parallel detect fault occurred */
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#define MII_IRQ_PAGE_RX BIT5 /**< Page receive occurred */
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#define MII_IRQ_RX_ERROR BIT6 /**< Receive error occurred */
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#define MII_IRQ_JABBER BIT7 /**< Jabber occurred */
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#define MII_IRQ_EN_LINK_UP BIT8 /**< Enable Link-up occurred IRQ */
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#define MII_IRQ_EN_RMT_FAULT BIT9 /**< Enable Remote fault occurred IRQ */
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#define MII_IRQ_EN_LINK_DOWN BIT10 /**< Enable Link-down occurred IRQ */
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#define MII_IRQ_EN_LPA_ACK BIT11 /**< Enable Link partner acknowledge occurred IRQ */
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#define MII_IRQ_EN_PD_FAULT BIT12 /**< Enable Parallel detect fault occurred IRQ */
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#define MII_IRQ_EN_PAGE_RX BIT13 /**< Enable Page receive occurred IRQ */
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#define MII_IRQ_EN_RX_ERROR BIT14 /**< Enable Receive error occurred IRQ */
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#define MII_IRQ_EN_JABBER BIT15 /**< Enable Jabber occurred IRQ */
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/** @} */
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/**
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* @brief Check if an Ethernet PHY supports 100 Mbps at full duplex
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*
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* @param[in] bmsr Value of the MII basic mode status register
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*
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* @retval true PHY supports 100 Mbps at full duplex
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* @retval false PHY does not support 100 Mbps at full duplex
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*/
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static inline bool mii_can_100_mbps_full_dp(uint16_t bmsr)
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{
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return (bmsr & (MII_BMSR_100_TX_F | MII_BMSR_100_T2_F));
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}
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/**
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* @brief Check if an Ethernet PHY supports 100 Mbps at half duplex
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*
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* @param[in] bmsr Value of the MII basic mode status register
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*
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* @retval true PHY supports 100 Mbps at half duplex
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* @retval false PHY does not support 100 Mbps at half duplex
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*/
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static inline bool mii_can_100_mbps_half_dp(uint16_t bmsr)
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{
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return (bmsr & (MII_BMSR_100_T4 | MII_BMSR_100_TX_H | MII_BMSR_100_T2_H));
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}
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/**
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* @brief Check if an Ethernet PHY supports 10 Mbps at full duplex
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*
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* @param[in] bmsr Value of the MII basic mode status register
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*
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* @retval true PHY supports 10 Mbps at full duplex
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* @retval false PHY does not support 10 Mbps at full duplex
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*/
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static inline bool mii_can_10_mbps_full_dp(uint16_t bmsr)
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{
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return (bmsr & MII_BMSR_10_F);
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}
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/**
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* @brief Check if an Ethernet PHY supports 10 Mbps at half duplex
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*
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* @param[in] bmsr Value of the MII basic mode status register
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*
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* @retval true PHY supports 10 Mbps at half duplex
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* @retval false PHY does not support 10 Mbps at half duplex
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*/
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static inline bool mii_can_10_mbps_half_dp(uint16_t bmsr)
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{
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return (bmsr & MII_BMSR_10_H);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* MII_H */
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/** @} */
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