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https://github.com/RIOT-OS/RIOT.git
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417 lines
11 KiB
C
417 lines
11 KiB
C
/*
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* Copyright (C) 2015 Ell-i open source co-operative
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* Kaspar Schleiser <kaspar@schleiser.de>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup drivers_encx24j600
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* @{
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*
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* @file
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* @brief Internal functions for the ENCX24J600 driver
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*
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* @author Kaspar Schleiser <kaspar@schleiser.de>
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*
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* @}
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*/
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#include <errno.h>
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#include "mutex.h"
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#include "encx24j600.h"
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#include "encx24j600_internal.h"
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#include "encx24j600_defines.h"
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#include "xtimer.h"
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#include "net/netdev.h"
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#include "net/netdev/eth.h"
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#include "net/eui64.h"
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#include "net/ethernet.h"
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#define ENABLE_DEBUG 0
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#include "debug.h"
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#define SPI_CLK SPI_CLK_1MHZ
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#define SPI_MODE SPI_MODE_0
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#define ENCX24J600_INIT_DELAY (100000U)
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#define ENC_BUFFER_START (0x0000)
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#define ENC_BUFFER_SIZE (0x6000)
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#define ENC_BUFFER_END (0x5FFF)
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#define RX_BUFFER_START (0x5340) /* Default value */
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#define RX_BUFFER_END (ENC_BUFFER_END)
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#define TX_BUFFER_LEN (0x2000)
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#define TX_BUFFER_END (RX_BUFFER_START)
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#define TX_BUFFER_START (TX_BUFFER_END - TX_BUFFER_LEN)
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static void cmd(encx24j600_t *dev, uint8_t cmd);
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static void reg_set(encx24j600_t *dev, uint8_t reg, uint16_t value);
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static uint16_t reg_get(encx24j600_t *dev, uint8_t reg);
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static void reg_clear_bits(encx24j600_t *dev, uint8_t reg, uint16_t mask);
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static inline int _packets_available(encx24j600_t *dev);
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static void _get_mac_addr(netdev_t *dev, uint8_t* buf);
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/* netdev interface */
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static int _send(netdev_t *netdev, const iolist_t *iolist);
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static int _recv(netdev_t *netdev, void *buf, size_t len, void *info);
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static int _init(netdev_t *dev);
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static void _isr(netdev_t *dev);
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static int _get(netdev_t *dev, netopt_t opt, void *value, size_t max_len);
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static const netdev_driver_t netdev_driver_encx24j600 = {
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.send = _send,
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.recv = _recv,
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.init = _init,
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.isr = _isr,
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.get = _get,
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.set = netdev_eth_set,
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};
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static inline void lock(encx24j600_t *dev) {
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spi_acquire(dev->spi, dev->cs, SPI_MODE, SPI_CLK);
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}
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static inline void unlock(encx24j600_t *dev) {
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spi_release(dev->spi);
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}
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void encx24j600_setup(encx24j600_t *dev, const encx24j600_params_t *params, uint8_t index)
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{
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dev->netdev.driver = &netdev_driver_encx24j600;
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dev->spi = params->spi;
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dev->cs = params->cs_pin;
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dev->int_pin = params->int_pin;
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dev->rx_next_ptr = RX_BUFFER_START;
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netdev_register(&dev->netdev, NETDEV_ENCX24J600, index);
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}
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static void encx24j600_isr(void *arg)
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{
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encx24j600_t *dev = arg;
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/* disable interrupt line */
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gpio_irq_disable(dev->int_pin);
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/* call netdev hook */
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netdev_trigger_event_isr(&dev->netdev);
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}
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static void _isr(netdev_t *netdev)
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{
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encx24j600_t *dev = (encx24j600_t *) netdev;
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uint16_t eir;
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lock(dev);
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cmd(dev, ENC_CLREIE);
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eir = reg_get(dev, ENC_EIR);
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/* check & handle link state change */
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if (eir & ENC_LINKIF) {
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uint16_t estat = reg_get(dev, ENC_ESTAT);
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netdev_event_t event = (estat & ENC_PHYLNK) ?
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NETDEV_EVENT_LINK_DOWN :
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NETDEV_EVENT_LINK_UP;
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netdev->event_callback(netdev, event);
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}
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/* check & handle available packets */
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if (eir & ENC_PKTIF) {
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while (_packets_available(dev)) {
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unlock(dev);
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netdev->event_callback(netdev, NETDEV_EVENT_RX_COMPLETE);
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lock(dev);
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}
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}
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/* drop all flags */
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reg_clear_bits(dev, ENC_EIR, ENC_LINKIF);
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/* re-enable interrupt */
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gpio_irq_enable(dev->int_pin);
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cmd(dev, ENC_SETEIE);
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unlock(dev);
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}
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static inline void enc_spi_transfer(encx24j600_t *dev, char *out, char *in, int len)
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{
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spi_transfer_bytes(dev->spi, dev->cs, false, out, in, len);
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}
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static inline uint16_t reg_get(encx24j600_t *dev, uint8_t reg)
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{
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char cmd_buf[4] = { ENC_RCRU, reg, 0, 0 };
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char result[4];
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enc_spi_transfer(dev, cmd_buf, result, 4);
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return result[2] | (result[3] << 8);
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}
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static void phy_reg_set(encx24j600_t *dev, uint8_t reg, uint16_t value) {
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reg_set(dev, ENC_MIREGADR, reg | (1<<8));
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reg_set(dev, ENC_MIWR, value);
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}
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static void cmd(encx24j600_t *dev, uint8_t cmd) {
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spi_transfer_byte(dev->spi, dev->cs, false, cmd);
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}
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static void cmdn(encx24j600_t *dev, uint8_t cmd, char *out, char *in, int len) {
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spi_transfer_byte(dev->spi, dev->cs, true, cmd);
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spi_transfer_bytes(dev->spi, dev->cs, false, out, in, len);
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}
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static void reg_set(encx24j600_t *dev, uint8_t reg, uint16_t value)
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{
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char cmd_buf[4] = { ENC_WCRU, reg, value, value >> 8 };
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enc_spi_transfer(dev, cmd_buf, NULL, 4);
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}
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static void reg_set_bits(encx24j600_t *dev, uint8_t reg, uint16_t mask)
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{
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char cmd_buf[4] = { ENC_BFSU, reg, mask, mask >> 8 };
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enc_spi_transfer(dev, cmd_buf, NULL, 4);
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}
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static void reg_clear_bits(encx24j600_t *dev, uint8_t reg, uint16_t mask)
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{
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char cmd_buf[4] = { ENC_BFCU, reg, mask, mask >> 8 };
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enc_spi_transfer(dev, cmd_buf, NULL, 4);
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}
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/*
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* @brief Read/Write to encx24j600's SRAM
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*
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* @param[in] dev ptr to encx24j600 device handle
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* @param[in] cmd either ENC_WGPDATA, ENC_RGPDATA, ENC_WRXDATA, ENC_RRXDATA, ENC_WUDADATA, ENC_RUDADATA
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* @param[in] addr SRAM address to start reading. 0xFFFF means continue from old address
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* @param ptr pointer to buffer to read from / write to
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* @param[in] len nr of bytes to read/write
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*/
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static void sram_op(encx24j600_t *dev, uint16_t cmd, uint16_t addr, char *ptr, int len)
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{
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uint16_t reg;
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char* in = NULL;
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char* out = NULL;
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if (!len) {
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return;
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}
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/* determine pointer addr
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*
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* all SRAM access commands have an
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* offset 0x5e to their pointer registers
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* */
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reg = cmd + 0x5e;
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/* read or write? bit 1 tells us */
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if (reg & 0x2) {
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out = ptr;
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} else {
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in = ptr;
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}
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/* set pointer */
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if (addr != 0xFFFF) {
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reg_set(dev, reg, addr);
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}
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/* copy data */
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cmdn(dev, cmd, in, out, len);
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}
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static int _init(netdev_t *encdev)
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{
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encx24j600_t *dev = (encx24j600_t *) encdev;
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DEBUG("encx24j600: starting initialization...\n");
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/* setup IO */
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if (spi_init_cs(dev->spi, dev->cs) != SPI_OK) {
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return -1;
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}
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gpio_init_int(dev->int_pin, GPIO_IN_PU, GPIO_FALLING, encx24j600_isr, (void*)dev);
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lock(dev);
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/* initialization procedure as described in data sheet (39935c.pdf) */
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do {
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do {
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xtimer_usleep(ENCX24J600_INIT_DELAY);
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reg_set(dev, ENC_EUDAST, 0x1234);
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xtimer_usleep(ENCX24J600_INIT_DELAY);
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} while (reg_get(dev, ENC_EUDAST) != 0x1234);
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while (!(reg_get(dev, ENC_ESTAT) & ENC_CLKRDY)) {}
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/* issue System Reset */
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cmd(dev, ENC_SETETHRST);
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/* make sure initialization finalizes */
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xtimer_usleep(1000);
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} while (!(reg_get(dev, ENC_EUDAST) == 0x0000));
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/* configure flow control */
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phy_reg_set(dev, ENC_PHANA, 0x05E1);
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reg_set_bits(dev, ENC_ECON2, ENC_AUTOFC);
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/* setup receive buffer */
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reg_set(dev, ENC_ERXST, RX_BUFFER_START);
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reg_set(dev, ENC_ERXTAIL, RX_BUFFER_END);
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dev->rx_next_ptr = RX_BUFFER_START;
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/* configure receive filter to receive multicast frames */
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reg_set_bits(dev, ENC_ERXFCON, ENC_MCEN);
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/* setup interrupts */
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reg_set_bits(dev, ENC_EIE, ENC_PKTIE | ENC_LINKIE);
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cmd(dev, ENC_ENABLERX);
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cmd(dev, ENC_SETEIE);
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DEBUG("encx24j600: initialization complete.\n");
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unlock(dev);
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return 0;
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}
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static int _send(netdev_t *netdev, const iolist_t *iolist) {
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encx24j600_t * dev = (encx24j600_t *) netdev;
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lock(dev);
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/* wait until previous packet has been sent */
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while ((reg_get(dev, ENC_ECON1) & ENC_TXRTS)) {}
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/* copy packet to SRAM */
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size_t len = 0;
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for (const iolist_t *iol = iolist; iol; iol = iol->iol_next) {
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sram_op(dev, ENC_WGPDATA, ((iol == iolist) ? TX_BUFFER_START : 0xFFFF), iol->iol_base, iol->iol_len);
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len += iol->iol_len;
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}
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/* set start of TX packet and length */
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reg_set(dev, ENC_ETXST, TX_BUFFER_START);
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reg_set(dev, ENC_ETXLEN, len);
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/* initiate sending */
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cmd(dev, ENC_SETTXRTS);
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/* wait for sending to complete */
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/* (not sure if it is needed, keeping the line uncommented) */
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/*while ((reg_get(dev, ENC_ECON1) & ENC_TXRTS)) {}*/
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unlock(dev);
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return len;
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}
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static inline int _packets_available(encx24j600_t *dev)
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{
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/* return ENC_PKTCNT (low byte of ENC_ESTAT) */
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return reg_get(dev, ENC_ESTAT) & ~0xFF00;
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}
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static void _get_mac_addr(netdev_t *encdev, uint8_t* buf)
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{
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encx24j600_t * dev = (encx24j600_t *) encdev;
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uint16_t addr[3];
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lock(dev);
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addr[0] = reg_get(dev, ENC_MAADR1);
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addr[1] = reg_get(dev, ENC_MAADR2);
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addr[2] = reg_get(dev, ENC_MAADR3);
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memcpy(buf, addr, sizeof(addr));
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unlock(dev);
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}
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static int _recv(netdev_t *netdev, void *buf, size_t len, void *info)
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{
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encx24j600_t * dev = (encx24j600_t *) netdev;
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encx24j600_frame_hdr_t hdr;
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(void)info;
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lock(dev);
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/* read frame header */
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sram_op(dev, ENC_RRXDATA, dev->rx_next_ptr, (char*)&hdr, sizeof(hdr));
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/* hdr.frame_len given by device contains 4 bytes checksum */
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size_t payload_len = hdr.frame_len - 4;
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if (buf) {
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if (payload_len > len) {
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/* payload exceeds buffer size */
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unlock(dev);
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return -ENOBUFS;
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}
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/* read packet (without 4 bytes checksum) */
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sram_op(dev, ENC_RRXDATA, 0xFFFF, buf, payload_len);
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}
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/* Frame was retrieved or drop was requested --> remove it from buffer */
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if (buf || (len > 0)) {
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/* decrement available packet count */
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cmd(dev, ENC_SETPKTDEC);
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dev->rx_next_ptr = hdr.rx_next_ptr;
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reg_set(dev, ENC_ERXTAIL, dev->rx_next_ptr - 2);
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}
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unlock(dev);
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return payload_len;
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}
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static int _get(netdev_t *dev, netopt_t opt, void *value, size_t max_len)
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{
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int res = 0;
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switch (opt) {
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case NETOPT_ADDRESS:
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if (max_len < ETHERNET_ADDR_LEN) {
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res = -EINVAL;
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}
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else {
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_get_mac_addr(dev, (uint8_t*)value);
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res = ETHERNET_ADDR_LEN;
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}
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break;
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case NETOPT_LINK:
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{
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encx24j600_t * encdev = (encx24j600_t *) dev;
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lock(encdev);
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if (reg_get(encdev, ENC_ESTAT) & ENC_PHYLNK) {
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*((netopt_enable_t *)value) = NETOPT_ENABLE;
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}
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else {
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*((netopt_enable_t *)value) = NETOPT_DISABLE;
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}
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unlock(encdev);
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return sizeof(netopt_enable_t);
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}
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default:
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res = netdev_eth_get(dev, opt, value, max_len);
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break;
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}
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return res;
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}
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