mirror of
https://github.com/RIOT-OS/RIOT.git
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89846f8cea
This commit includes the following cleanups: - The macros `I2C_DEV_1_USED` and `SPI_DEV_1_USED` are now used with the values 0 and 1. This allows to enable but also to disable the second interface even if the board definition enables it by default. - The second I2C device `I2C_DEV(1)` and the second SPI device `SPI_DEV(1)` are now disabled by default. - The second SPI device `SPI_DEV(1)` now uses PB5 as default CS signal instead of PA4 to keep PA4 free for ADC or DAC even if `SPI_DEV(1)` is used, for example for the TFT display.
111 lines
2.9 KiB
C
111 lines
2.9 KiB
C
/*
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* Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
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* 2023 Gunar Schorcht <gunar@schorcht.net>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_common_gd32v
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* @{
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*
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* @file
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* @brief Common peripheral configuration for GD32VF103 boards
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*
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* @author Koen Zandberg <koen@bergzand.net>
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef CFG_SPI_DEFAULT_H
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#define CFG_SPI_DEFAULT_H
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name SPI configuration
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* @{
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*/
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/**
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* @brief Disable the second SPI device `SPI_DEV(1)` by default
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*
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* The second SPI device `SPI_DEV(1)` is only defined if `SPI_DEV_1_USED`
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* is set to 1 by the board.
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* This allows to use the default configuration with one or two SPI devices
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* depending on whether other peripherals are enabled that would collide with
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* the SPI devices.
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*/
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#ifndef SPI_DEV_1_USED
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#define SPI_DEV_1_USED 0
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#endif
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/**
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* @brief Defines PB12 as the default CS signal for `SPI_DEV(0)`
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*
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* Overriding this default allows the use of another pin as CS signal if
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* the default CS signal is connected to an unused hardware.
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*/
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#ifndef SPI_DEV_0_CS
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#define SPI_DEV_0_CS GPIO_PIN(PORT_B, 12)
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#endif
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/**
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* @brief Defines PA4 as the default CS signal for `SPI_DEV(1)`
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*
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* Overriding this default allows the use of another pin as CS signal if
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* the default CS signal is connected to an unused hardware.
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*/
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#ifndef SPI_DEV_1_CS
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#define SPI_DEV_1_CS GPIO_PIN(PORT_B, 5)
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#endif
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/**
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* @brief Default SPI device configuration
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*
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* The default SPI device configuration allows to define up to two SPI devices
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* `SPI_DEV(0)` and `SPI_DEV(1)`. `SPI_DEV(0)` is always defined if the SPI
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* peripheral is enabled by the module `periph_spi`. The second SPI device
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* `SPI_DEV(1)` is only defined if `SPI_DEV_1_USED` is set to 1 by the board.
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* This allows to use the default configuration with one or two SPI devices
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* depending on whether other peripherals are enabled that would collide with
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* the SPI devices.
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI1,
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.mosi_pin = GPIO_PIN(PORT_B, 15),
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.miso_pin = GPIO_PIN(PORT_B, 14),
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.sclk_pin = GPIO_PIN(PORT_B, 13),
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.cs_pin = SPI_DEV_0_CS,
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.rcumask = RCU_APB1EN_SPI1EN_Msk,
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.apbbus = APB1,
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},
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#if SPI_DEV_1_USED
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{
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.dev = SPI0,
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.mosi_pin = GPIO_PIN(PORT_A, 7),
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.miso_pin = GPIO_PIN(PORT_A, 6),
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.sclk_pin = GPIO_PIN(PORT_A, 5),
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.cs_pin = SPI_DEV_1_CS,
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.rcumask = RCU_APB2EN_SPI0EN_Msk,
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.apbbus = APB2,
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},
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#endif
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* CFG_SPI_DEFAULT_H */
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/** @} */
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