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RIOT/cpu/arm7_common
Marian Buschsieweke 5f355e7210
cpu/arm7_common: Make irq_*() compiler barriers
Previously the compiler was allowed to reorder access to the interrupt control
registers in regard to memory access not marked as `volatile` (at least some
people - most notably some compiler developers - read the C standard this way).
In practise this did not happen as irq_disable(), irq_restore(), irq_enable()
are part of a separate compilation unit: Calls to external functions unknown to
the compiler are treated as if they were memory barriers. But if link time
optimization (LTO) is enabled, this no longer would work: The compiler could
inline the code accessing the interrupt control registers and reorder the memory
accesses wrapped in irq_disable() and irq_restore() outside of their protection.

This commit adds the "memory" clobber to the inline assembly accessing the
interrupt control registers. This makes those accesses explicit compiler memory
barriers. The machine code generated without LTO enabled should not differ in
any way by this commit. But the use of irq_*() should now be safe with LTO.
2019-04-24 16:29:30 +02:00
..
include cpu: instead of cpp-style, use C-style comments 2018-02-06 16:59:58 +01:00
periph cpu: make use of Makefile.periph 2017-11-06 12:01:19 +01:00
arm_cpu.c all: fix my email address 2017-10-20 15:02:41 +02:00
bootloader.c cpu: lpc2387: use while(1){} instead of exit 2019-01-10 12:15:44 +01:00
common.s cpu/arm7_common: remove dINT/eINT definitions 2015-09-19 10:37:20 +02:00
Makefile cpu/arm7: moved pm_reboot to periph/pm.c 2017-01-19 11:05:44 +01:00
Makefile.features cpu: arm7: reorganize Makefile.features 2017-11-02 12:59:45 +01:00
Makefile.include cpu/arm7: moved pm_reboot to periph/pm.c 2017-01-19 11:05:44 +01:00
VIC.c cpu/arm7_common: Make irq_*() compiler barriers 2019-04-24 16:29:30 +02:00