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RIOT/cpu/nrf52/Makefile.include
2019-10-18 08:55:33 +02:00

32 lines
919 B
Makefile

CPU_ARCH = cortex-m4f
export CPU_FAM = nrf52
# Slot size is determined by "((total_flash_size - RIOTBOOT_LEN) / 2)".
# If RIOTBOOT_LEN uses an uneven number of flashpages, the remainder of the
# flash cannot be divided by two slots while staying FLASHPAGE_SIZE aligned.
RIOTBOOT_LEN ?= 0x2000
# Export internal ROM alignment and slot sizes for bootloader support
export MCUBOOT_IMAGE_ALIGN = 8
export MCUBOOT_SLOT0_SIZE = 0x8000
export MCUBOOT_SLOT1_SIZE = 0x3C000
export MCUBOOT_SLOT2_SIZE = 0x3C000
# Set ROM and RAM lengths according to CPU model
ifneq (,$(filter nrf52832xxaa,$(CPU_MODEL)))
ROM_LEN ?= 0x80000
RAM_LEN ?= 0x10000
endif
ifneq (,$(filter nrf52840xxaa,$(CPU_MODEL)))
ROM_LEN ?= 0x100000
RAM_LEN ?= 0x40000
endif
ROM_START_ADDR ?= 0x00000000
RAM_START_ADDR ?= 0x20000000
LINKER_SCRIPT ?= cortexm.ld
include $(RIOTCPU)/nrf5x_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk