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RIOT/cpu/fe310
Francisco Molina 5e47fc7e22 cpu: do not auto-select ztimer_periph_rtt for sam0, fe310
The sam0 rtt busy loops for 180us every time an alarm is set or
the counter is read, this propagates and leads to timing errors
on ztimer_msec that are higher than > +-1msec.

The same goes for fe310.
2021-12-14 18:43:53 +01:00
..
include cpu/fe310: uncrustify 2021-11-18 15:44:17 +01:00
periph cpu/periph/i2c: update implementations to new I2C API 2021-11-29 06:35:25 +01:00
vendor cpu/fe310: model Kconfig 2021-10-01 11:26:15 +02:00
clock.c riscv_common: Refactor common fe310 code to riscv_common 2021-02-05 09:32:19 +01:00
cpu.c riscv_common: Refactor common fe310 code to riscv_common 2021-02-05 09:32:19 +01:00
doc.txt riscv_common: Refactor common fe310 code to riscv_common 2021-02-05 09:32:19 +01:00
Kconfig cpu: do not auto-select ztimer_periph_rtt for sam0, fe310 2021-12-14 18:43:53 +01:00
Kconfig.clk cpu/fe310: move clock Kconfig to cpu 2020-12-17 15:53:31 +01:00
Makefile riscv_common: Refactor common fe310 code to riscv_common 2021-02-05 09:32:19 +01:00
Makefile.dep cpu/riscv_common: move C lib selection to common place 2021-08-25 10:53:00 +02:00
Makefile.features cpu/fe310: add CPU_CORE information 2021-09-22 15:51:54 +02:00
Makefile.include riscv_common: Refactor common fe310 code to riscv_common 2021-02-05 09:32:19 +01:00