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RIOT/cpu/sam0_common
Benjamin Valentin 585dc15f99 cpu/sam0_common: UART: implement inverted RX & TX
The UART TX and TX lines on SAMD5x and SAML1x can be inverted.
However, the flags don't do exactly what one would expect.

See errata 2.18.5: SERCOM-UART: TXINV and RXINV Bits Reference:

> The TXINV and RXINV bits in the CTRLA register have inverted functionality.
>
> Workaround:
> In software interpret the TXINV bit as a functionality of RXINV, and conversely,
> interpret the RXINV bit as a functionality of TXINV.
2020-06-16 22:55:37 +02:00
..
include cpu/sam0_common: UART: implement inverted RX & TX 2020-06-16 22:55:37 +02:00
ldscripts sam0_common: Adjust ldscript memory segment attributes 2018-05-09 06:49:02 +02:00
periph cpu/sam0_common: UART: implement inverted RX & TX 2020-06-16 22:55:37 +02:00
doc.txt cpu/sam0: update doc.txt with new MCU families 2019-07-17 11:37:46 +02:00
Kconfig sam0_common: Add DMA peripheral driver 2020-06-12 20:04:05 +02:00
Makefile cpu/sam0: renamed sam21_common to sam0_common 2016-12-15 11:47:03 +01:00
Makefile.dep cpu/sam0_common: Move periph_timer_periodic feature to Makefile.features 2020-05-29 11:13:59 +02:00
Makefile.features cpu/samd5x: Add DMA peripheral to init 2020-06-12 20:04:05 +02:00
Makefile.include Merge pull request #13607 from benpicco/cpu/sam0_common/generic_RAM_ROM 2020-03-31 15:55:04 +02:00