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mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
RIOT/tests/periph_spi
2020-06-21 21:21:39 +02:00
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main.c tests/periph_spi: add test for periph_spi_reconfigure feature 2020-06-21 21:21:39 +02:00
Makefile tests/periph_spi: add test for periph_spi_reconfigure feature 2020-06-21 21:21:39 +02:00
Makefile.ci tests: add stm32f030f4-demo to Makefile.ci 2019-10-21 15:33:11 +02:00
README.md tests/periph_spi: Expose default SPI CS pins 2020-05-20 10:44:57 +02:00

Expected result

You should be presented with the RIOT shell, providing you with commands to initialize a board as master or slave, and to send and receive data via SPI.

Background

Test for the low-level SPI driver.

Default SPI CS pin

To overwrite the optional default cs pin CFLAGS can be used:

CFLAGS="-DDEFAULT_SPI_CS_PORT=<my_port_int> -DDEFAULT_SPI_CS_PIN=<my_pin_int>" BOARD=<my_board> make flash term