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https://github.com/RIOT-OS/RIOT.git
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155 lines
4.1 KiB
C
155 lines
4.1 KiB
C
/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup boards_stm32f0discovery
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the STM32F0discovery board
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_CONF_H_
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#define PERIPH_CONF_H_
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock system configuration
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* @{
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*/
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#define CLOCK_HSE (8000000U) /* external oscillator */
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#define CLOCK_CORECLOCK (48000000U) /* desired core clock frequency */
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/* the actual PLL values are automatically generated */
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#define CLOCK_PLL_MUL (CLOCK_CORECLOCK / CLOCK_HSE)
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/** @} */
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/**
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* @name Timer configuration
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* @{
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*/
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#define TIMER_NUMOF (1U)
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#define TIMER_0_EN 1
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#define TIMER_IRQ_PRIO 1
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/* Timer 0 configuration */
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#define TIMER_0_DEV TIM2
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#define TIMER_0_CHANNELS 4
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#define TIMER_0_FREQ (CLOCK_CORECLOCK)
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#define TIMER_0_MAX_VALUE (0xffffffff)
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#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
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#define TIMER_0_ISR isr_tim2
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#define TIMER_0_IRQ_CHAN TIM2_IRQn
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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#define UART_NUMOF (2U)
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#define UART_0_EN 1
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#define UART_1_EN 1
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#define UART_IRQ_PRIO 1
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/* UART 0 device configuration */
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#define UART_0_DEV USART1
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#define UART_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_USART1EN)
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#define UART_0_CLKDIS() (RCC->APB2ENR &= (~RCC_APB2ENR_USART1EN))
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#define UART_0_IRQ USART1_IRQn
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#define UART_0_ISR isr_usart1
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/* UART 0 pin configuration */
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#define UART_0_PORT GPIOB
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#define UART_0_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOBEN)
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#define UART_0_RX_PIN 7
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#define UART_0_TX_PIN 6
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#define UART_0_AF 0
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/* UART 1 device configuration */
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#define UART_1_DEV USART2
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#define UART_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART2EN)
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#define UART_1_CLKDIS() (RCC->APB1ENR &= (~RCC_APB1ENR_USART2EN))
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#define UART_1_IRQ USART2_IRQn
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#define UART_1_ISR isr_usart2
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/* UART 1 pin configuration */
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#define UART_1_PORT GPIOA
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#define UART_1_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN)
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#define UART_1_RX_PIN 3
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#define UART_1_TX_PIN 2
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#define UART_1_AF 1
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/** @} */
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/**
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* @brief ADC configuration
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*
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* We need to configure the following values:
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* [ pin, channel ]
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* @{
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*/
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#define ADC_CONFIG { \
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{ GPIO_PIN(PORT_C, 0), 10 },\
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{ GPIO_PIN(PORT_C, 1), 11 },\
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{ GPIO_PIN(PORT_C, 2), 12 },\
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{ GPIO_PIN(PORT_C, 3), 13 },\
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{ GPIO_PIN(PORT_C, 4), 14 },\
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{ GPIO_PIN(PORT_C, 5), 15 } \
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}
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#define ADC_NUMOF (6)
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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#define SPI_NUMOF (2U)
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#define SPI_0_EN 1
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#define SPI_1_EN 1
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#define SPI_IRQ_PRIO 1
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/* SPI 0 device config */
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#define SPI_0_DEV SPI1
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#define SPI_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_SPI1EN)
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#define SPI_0_CLKDIS() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN))
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#define SPI_0_IRQ SPI1_IRQn
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#define SPI_0_ISR isr_spi1
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/* SPI 1 pin configuration */
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#define SPI_0_PORT GPIOA
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#define SPI_0_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN)
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#define SPI_0_PIN_SCK 5
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#define SPI_0_PIN_MISO 6
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#define SPI_0_PIN_MOSI 7
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#define SPI_0_PIN_AF 0
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/* SPI 1 device config */
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#define SPI_1_DEV SPI2
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#define SPI_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_SPI2EN)
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#define SPI_1_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI2EN))
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#define SPI_1_IRQ SPI2_IRQn
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#define SPI_1_ISR isr_spi2
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/* SPI 1 pin configuration */
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#define SPI_1_PORT GPIOB
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#define SPI_1_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOBEN)
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#define SPI_1_PIN_SCK 13
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#define SPI_1_PIN_MISO 14
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#define SPI_1_PIN_MOSI 15
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#define SPI_1_PIN_AF 0
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H_ */
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