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35a1b60068
core_panic() doesn't expect the message to be in program memory, but in data memory. Bad things will happen on AVR when the address is interpreted as being in data address space, but the allocation is done in program address space.
112 lines
2.9 KiB
C
112 lines
2.9 KiB
C
/*
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* Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
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* 2017 RWTH Aachen, Josua Arndt
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* 2018 Matthew Blue
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* 2021 Gerson Fernando Budke
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_atmega_common
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* @{
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*
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* @file
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* @brief Implementation of the CPU initialization
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*
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* @author Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
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* @author Steffen Robertz <steffen.robertz@rwth-aachen.de>
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* @author Josua Arndt <jarndt@ias.rwth-aachen.de>
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* @author Matthew Blue <matthew.blue.neuro@gmail.com>
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* @author Francisco Acosta <francisco.acosta@inria.fr>
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* @author Gerson Fernando Budke <nandojve@gmail.com>
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*
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* @}
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*/
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#include "board.h"
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#include "cpu.h"
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#include "panic.h"
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#define ENABLE_DEBUG 0
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#include "debug.h"
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#ifndef CPU_ATMEGA_CLK_SCALE_INIT
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#define CPU_ATMEGA_CLK_SCALE_INIT CPU_ATMEGA_CLK_SCALE_DIV1
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#endif
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extern uint8_t mcusr_mirror;
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extern uint8_t soft_rst;
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void avr8_reset_cause(void)
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{
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if (mcusr_mirror & (1 << PORF)) {
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DEBUG("Power-on reset.\n");
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}
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if (mcusr_mirror & (1 << EXTRF)) {
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DEBUG("External reset!\n");
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}
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if (mcusr_mirror & (1 << BORF)) {
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DEBUG("Brownout reset!\n");
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}
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if (mcusr_mirror & (1 << WDRF)) {
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if (soft_rst & 0xAA) {
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DEBUG("Software reset!\n");
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} else {
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DEBUG("Watchdog reset!\n");
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}
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}
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#if !defined (CPU_ATMEGA328P)
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if (mcusr_mirror & (1 << JTRF)) {
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DEBUG("JTAG reset!\n");
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}
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#endif
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}
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void __attribute__((weak)) avr8_clk_init(void)
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{
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atmega_set_prescaler(CPU_ATMEGA_CLK_SCALE_INIT);
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}
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/* This is a vector which is aliased to __vector_default,
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* the vector executed when an ISR fires with no accompanying
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* ISR handler. This may be used along with the ISR() macro to
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* create a catch-all for undefined but used ISRs for debugging
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* purposes.
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* SCIRQS – Symbol Counter Interrupt Status Register
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* BATMON – Battery Monitor Control and Status Register
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* IRQ_STATUS /1 – Transceiver Interrupt Status Register
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* EIFR – External Interrupt Flag Register
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* PCIFR – Pin Change Interrupt Flag Register
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*/
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ISR(BADISR_vect)
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{
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avr8_reset_cause();
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#if defined (CPU_ATMEGA256RFR2)
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printf("IRQ_STATUS %#02x\nIRQ_STATUS1 %#02x\n",
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(unsigned int)IRQ_STATUS, (unsigned int)IRQ_STATUS1);
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printf("SCIRQS %#02x\nBATMON %#02x\n", (unsigned int)SCIRQS, (unsigned int)BATMON);
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printf("EIFR %#02x\nPCIFR %#02x\n", (unsigned int)EIFR, (unsigned int)PCIFR);
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#endif
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#ifdef LED_PANIC
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/* Use LED light to signal ERROR. */
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LED_PANIC;
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#endif
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core_panic(PANIC_GENERAL_ERROR, "BADISR");
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}
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#if defined(CPU_ATMEGA128RFA1) || defined (CPU_ATMEGA256RFR2)
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ISR(BAT_LOW_vect, ISR_BLOCK)
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{
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avr8_enter_isr();
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DEBUG("BAT_LOW\n");
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avr8_exit_isr();
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}
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#endif
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