mirror of
https://github.com/RIOT-OS/RIOT.git
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1492f00690
Downsized numbers of dynamic send and receive buffers.
184 lines
4.9 KiB
C
184 lines
4.9 KiB
C
/*
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* Copyright (C) 2018 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp32
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* @{
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*
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* @file
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* @brief SDK configuration compatible to the ESP-IDF
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*
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* The SDK configuration can be partially overriden by application-specific
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* board configuration.
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef SDK_CONF_H
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#define SDK_CONF_H
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#ifndef DOXYGEN
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "board.h"
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/**
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* @brief Defines the CPU frequency [vallues = 2, 40, 80, 160 and 240]
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*/
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#ifndef CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
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#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 80
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#endif
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/**
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* Default console configuration
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*
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* STDIO_UART_BAUDRATE is used as CONFIG_CONSOLE_UART_BAUDRATE and
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* can be overriden by an application specific configuration.
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*/
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#define CONFIG_CONSOLE_UART_NUM 0
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#ifndef CONFIG_CONSOLE_UART_BAUDRATE
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#define CONFIG_CONSOLE_UART_BAUDRATE STDIO_UART_BAUDRATE
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#endif
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/**
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* Log output configuration (DO NOT CHANGE)
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*/
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#ifndef CONFIG_LOG_DEFAULT_LEVEL
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#define CONFIG_LOG_DEFAULT_LEVEL LOG_LEVEL
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#endif
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/**
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* ESP32 specific configuration
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*
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* CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ can be overriden by an application
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* specific SDK configuration file.
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*/
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#ifndef CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
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#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 80
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#endif
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/**
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* ESP32 specific configuration
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*
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* Main clock crystal frequency (MHz). Zero means to auto-configure.
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* This is configured at the board level, defaulting to 40.
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*/
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#ifndef CONFIG_ESP32_XTAL_FREQ
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#define CONFIG_ESP32_XTAL_FREQ ESP32_XTAL_FREQ
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#endif
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#define CONFIG_ESP32_RTC_XTAL_BOOTSTRAP_CYCLES 100
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#define CONFIG_ESP32_RTC_CLK_CAL_CYCLES 1024
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/**
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* System specific configuration (DO NOT CHANGE)
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*/
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#define CONFIG_TRACEMEM_RESERVE_DRAM 0
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#define CONFIG_ULP_COPROC_RESERVE_MEM 0
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#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE 32
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#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE 2048
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#define CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS 4
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#define CONFIG_NEWLIB_NANO_FORMAT 0
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/**
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* Bluetooth configuration (DO NOT CHANGE)
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*/
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#define CONFIG_BT_ENABLED 0
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#define CONFIG_BT_RESERVE_DRAM 0
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/**
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* SPI RAM configuration (DO NOT CHANGE)
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*/
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#ifdef MODULE_ESP_SPI_RAM
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#define CONFIG_SPIRAM_SUPPORT 1
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#else
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#define CONFIG_SPIRAM_SUPPORT 0
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#endif
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#define CONFIG_SPIRAM_SPEED_40M 1
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#define CONFIG_SPIRAM_SIZE 4194304
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#define CONFIG_SPIRAM_BOOT_INIT 1
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#define CONFIG_SPIRAM_USE_MALLOC 1
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#define CONFIG_SPIRAM_TYPE_ESPPSRAM32 1
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#define CONFIG_SPIRAM_MEMTEST 1
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#define CONFIG_SPIRAM_CACHE_WORKAROUND 1
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#define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 16384
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#define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 32768
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/**
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* SPI Flash driver configuration (DO NOT CHANGE)
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*/
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#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
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/**
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* Ethernet driver configuration (DO NOT CHANGE)
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*/
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#define CONFIG_DMA_RX_BUF_NUM 10
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#define CONFIG_DMA_TX_BUF_NUM 10
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#define CONFIG_EMAC_TASK_PRIORITY 20
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/**
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* Serial flasher config (DO NOT CHANGE)
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*/
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#define CONFIG_ESPTOOLPY_FLASHFREQ_40M 1
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#if defined(FLASH_MODE_QIO)
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#define CONFIG_FLASHMODE_QIO 1
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#elif defined(FLASH_MODE_QOUT)
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#define CONFIG_FLASHMODE_QOUT 1
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#elif defined(FLASH_MODE_DIO)
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#define CONFIG_FLASHMODE_DIO 1
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#else
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#define CONFIG_FLASHMODE_DOUT 1
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#endif
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/**
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* Wi-Fi driver configuration (DO NOT CHANGE)
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*/
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#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 1
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#define CONFIG_ESP32_WIFI_STATIC_TX_BUFFER 0
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#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER 1
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#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM 20
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#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 10
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#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 20
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#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED 1
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#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED 1
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#define CONFIG_ESP32_WIFI_TX_BA_WIN 6
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#define CONFIG_ESP32_WIFI_RX_BA_WIN 6
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#define CONFIG_ESP32_WIFI_CSI_ENABLED 0
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#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 1
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#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1 0
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#define CONFIG_ESP32_WIFI_NVS_ENABLED 0
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/**
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* PHY configuration
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*/
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#define CONFIG_ESP32_PHY_MAX_TX_POWER 20
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#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER 20
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#define CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION 0
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#if MODULE_ESP_IDF_NVS_ENABLED
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#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE 1
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#endif
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/**
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* EMAC driver configuration (DO NOT CHANGE)
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*/
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#define CONFIG_EMAC_L2_TO_L3_RX_BUF_MODE 1
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#ifdef __cplusplus
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}
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#endif
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#endif /* DOXYGEN */
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#endif /* SDK_CONF_H */
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