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363 lines
17 KiB
C
363 lines
17 KiB
C
/******************************************************************************
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* Filename: hw_adi_2_refsys_h
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* Revised: 2017-01-31 09:37:48 +0100 (Tue, 31 Jan 2017)
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* Revision: 48345
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*
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* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#ifndef __HW_ADI_2_REFSYS_H__
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#define __HW_ADI_2_REFSYS_H__
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//*****************************************************************************
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//
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// This section defines the register offsets of
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// ADI_2_REFSYS component
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//
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//*****************************************************************************
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// Internal
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#define ADI_2_REFSYS_O_REFSYSCTL0 0x00000000
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// Internal
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#define ADI_2_REFSYS_O_SOCLDOCTL0 0x00000002
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// Internal
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#define ADI_2_REFSYS_O_SOCLDOCTL1 0x00000003
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// Internal
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#define ADI_2_REFSYS_O_SOCLDOCTL2 0x00000004
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// Internal
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#define ADI_2_REFSYS_O_SOCLDOCTL3 0x00000005
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// Internal
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#define ADI_2_REFSYS_O_SOCLDOCTL4 0x00000006
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// Internal
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#define ADI_2_REFSYS_O_SOCLDOCTL5 0x00000007
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// Internal
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#define ADI_2_REFSYS_O_HPOSCCTL0 0x0000000A
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// Internal
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#define ADI_2_REFSYS_O_HPOSCCTL1 0x0000000B
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// Internal
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#define ADI_2_REFSYS_O_HPOSCCTL2 0x0000000C
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//*****************************************************************************
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//
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// Register: ADI_2_REFSYS_O_REFSYSCTL0
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//
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//*****************************************************************************
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// Field: [4:0] TRIM_IREF
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_REFSYSCTL0_TRIM_IREF_W 5
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#define ADI_2_REFSYS_REFSYSCTL0_TRIM_IREF_M 0x0000001F
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#define ADI_2_REFSYS_REFSYSCTL0_TRIM_IREF_S 0
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//*****************************************************************************
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//
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// Register: ADI_2_REFSYS_O_SOCLDOCTL0
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//
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//*****************************************************************************
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// Field: [7:4] VTRIM_UDIG
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL0_VTRIM_UDIG_W 4
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#define ADI_2_REFSYS_SOCLDOCTL0_VTRIM_UDIG_M 0x000000F0
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#define ADI_2_REFSYS_SOCLDOCTL0_VTRIM_UDIG_S 4
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// Field: [3:0] VTRIM_BOD
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL0_VTRIM_BOD_W 4
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#define ADI_2_REFSYS_SOCLDOCTL0_VTRIM_BOD_M 0x0000000F
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#define ADI_2_REFSYS_SOCLDOCTL0_VTRIM_BOD_S 0
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//*****************************************************************************
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//
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// Register: ADI_2_REFSYS_O_SOCLDOCTL1
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//
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//*****************************************************************************
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// Field: [7:4] VTRIM_COARSE
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL1_VTRIM_COARSE_W 4
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#define ADI_2_REFSYS_SOCLDOCTL1_VTRIM_COARSE_M 0x000000F0
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#define ADI_2_REFSYS_SOCLDOCTL1_VTRIM_COARSE_S 4
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// Field: [3:0] VTRIM_DIG
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL1_VTRIM_DIG_W 4
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#define ADI_2_REFSYS_SOCLDOCTL1_VTRIM_DIG_M 0x0000000F
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#define ADI_2_REFSYS_SOCLDOCTL1_VTRIM_DIG_S 0
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//*****************************************************************************
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//
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// Register: ADI_2_REFSYS_O_SOCLDOCTL2
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//
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//*****************************************************************************
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// Field: [2:0] VTRIM_DELTA
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL2_VTRIM_DELTA_W 3
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#define ADI_2_REFSYS_SOCLDOCTL2_VTRIM_DELTA_M 0x00000007
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#define ADI_2_REFSYS_SOCLDOCTL2_VTRIM_DELTA_S 0
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//*****************************************************************************
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//
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// Register: ADI_2_REFSYS_O_SOCLDOCTL3
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//
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//*****************************************************************************
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// Field: [7:6] ITRIM_DIGLDO_LOAD
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_DIGLDO_LOAD_W 2
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_DIGLDO_LOAD_M 0x000000C0
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_DIGLDO_LOAD_S 6
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// Field: [5:3] ITRIM_DIGLDO
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// BIAS_120P Internal. Only to be used through TI provided API.
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// BIAS_100P Internal. Only to be used through TI provided API.
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// BIAS_80P Internal. Only to be used through TI provided API.
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// BIAS_60P Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_DIGLDO_W 3
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_DIGLDO_M 0x00000038
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_DIGLDO_S 3
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_DIGLDO_BIAS_120P 0x00000038
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_DIGLDO_BIAS_100P 0x00000028
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_DIGLDO_BIAS_80P 0x00000018
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_DIGLDO_BIAS_60P 0x00000000
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// Field: [2:0] ITRIM_UDIGLDO
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_UDIGLDO_W 3
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_UDIGLDO_M 0x00000007
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#define ADI_2_REFSYS_SOCLDOCTL3_ITRIM_UDIGLDO_S 0
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//*****************************************************************************
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//
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// Register: ADI_2_REFSYS_O_SOCLDOCTL4
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//
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//*****************************************************************************
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// Field: [6:5] UDIG_ITEST_EN
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL4_UDIG_ITEST_EN_W 2
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#define ADI_2_REFSYS_SOCLDOCTL4_UDIG_ITEST_EN_M 0x00000060
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#define ADI_2_REFSYS_SOCLDOCTL4_UDIG_ITEST_EN_S 5
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// Field: [4:2] DIG_ITEST_EN
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL4_DIG_ITEST_EN_W 3
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#define ADI_2_REFSYS_SOCLDOCTL4_DIG_ITEST_EN_M 0x0000001C
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#define ADI_2_REFSYS_SOCLDOCTL4_DIG_ITEST_EN_S 2
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// Field: [1] BIAS_DIS
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL4_BIAS_DIS 0x00000002
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#define ADI_2_REFSYS_SOCLDOCTL4_BIAS_DIS_M 0x00000002
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#define ADI_2_REFSYS_SOCLDOCTL4_BIAS_DIS_S 1
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// Field: [0] UDIG_LDO_EN
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// EN Internal. Only to be used through TI provided API.
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// DIS Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL4_UDIG_LDO_EN 0x00000001
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#define ADI_2_REFSYS_SOCLDOCTL4_UDIG_LDO_EN_M 0x00000001
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#define ADI_2_REFSYS_SOCLDOCTL4_UDIG_LDO_EN_S 0
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#define ADI_2_REFSYS_SOCLDOCTL4_UDIG_LDO_EN_EN 0x00000001
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#define ADI_2_REFSYS_SOCLDOCTL4_UDIG_LDO_EN_DIS 0x00000000
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//*****************************************************************************
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//
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// Register: ADI_2_REFSYS_O_SOCLDOCTL5
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//
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//*****************************************************************************
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// Field: [3] IMON_ITEST_EN
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL5_IMON_ITEST_EN 0x00000008
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#define ADI_2_REFSYS_SOCLDOCTL5_IMON_ITEST_EN_M 0x00000008
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#define ADI_2_REFSYS_SOCLDOCTL5_IMON_ITEST_EN_S 3
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// Field: [2:0] TESTSEL
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// VDD_AON Internal. Only to be used through TI provided API.
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// VREF_AMP Internal. Only to be used through TI provided API.
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// ITEST Internal. Only to be used through TI provided API.
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// NC Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_SOCLDOCTL5_TESTSEL_W 3
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#define ADI_2_REFSYS_SOCLDOCTL5_TESTSEL_M 0x00000007
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#define ADI_2_REFSYS_SOCLDOCTL5_TESTSEL_S 0
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#define ADI_2_REFSYS_SOCLDOCTL5_TESTSEL_VDD_AON 0x00000004
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#define ADI_2_REFSYS_SOCLDOCTL5_TESTSEL_VREF_AMP 0x00000002
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#define ADI_2_REFSYS_SOCLDOCTL5_TESTSEL_ITEST 0x00000001
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#define ADI_2_REFSYS_SOCLDOCTL5_TESTSEL_NC 0x00000000
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//*****************************************************************************
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//
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// Register: ADI_2_REFSYS_O_HPOSCCTL0
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//
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//*****************************************************************************
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// Field: [7] FILTER_EN
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL0_FILTER_EN 0x00000080
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#define ADI_2_REFSYS_HPOSCCTL0_FILTER_EN_M 0x00000080
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#define ADI_2_REFSYS_HPOSCCTL0_FILTER_EN_S 7
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// Field: [6:5] BIAS_RECHARGE_DLY
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// MIN_DLY_X8 Internal. Only to be used through TI provided API.
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// MIN_DLY_X4 Internal. Only to be used through TI provided API.
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// MIN_DLY_X2 Internal. Only to be used through TI provided API.
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// MIN_DLY_X1 Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL0_BIAS_RECHARGE_DLY_W 2
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#define ADI_2_REFSYS_HPOSCCTL0_BIAS_RECHARGE_DLY_M 0x00000060
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#define ADI_2_REFSYS_HPOSCCTL0_BIAS_RECHARGE_DLY_S 5
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#define ADI_2_REFSYS_HPOSCCTL0_BIAS_RECHARGE_DLY_MIN_DLY_X8 0x00000060
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#define ADI_2_REFSYS_HPOSCCTL0_BIAS_RECHARGE_DLY_MIN_DLY_X4 0x00000040
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#define ADI_2_REFSYS_HPOSCCTL0_BIAS_RECHARGE_DLY_MIN_DLY_X2 0x00000020
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#define ADI_2_REFSYS_HPOSCCTL0_BIAS_RECHARGE_DLY_MIN_DLY_X1 0x00000000
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// Field: [4:3] TUNE_CAP
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// SHIFT_M108 Internal. Only to be used through TI provided API.
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// SHIFT_M70 Internal. Only to be used through TI provided API.
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// SHIFT_M35 Internal. Only to be used through TI provided API.
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// SHIFT_0 Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL0_TUNE_CAP_W 2
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#define ADI_2_REFSYS_HPOSCCTL0_TUNE_CAP_M 0x00000018
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#define ADI_2_REFSYS_HPOSCCTL0_TUNE_CAP_S 3
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#define ADI_2_REFSYS_HPOSCCTL0_TUNE_CAP_SHIFT_M108 0x00000018
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#define ADI_2_REFSYS_HPOSCCTL0_TUNE_CAP_SHIFT_M70 0x00000010
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#define ADI_2_REFSYS_HPOSCCTL0_TUNE_CAP_SHIFT_M35 0x00000008
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#define ADI_2_REFSYS_HPOSCCTL0_TUNE_CAP_SHIFT_0 0x00000000
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// Field: [2:1] SERIES_CAP
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL0_SERIES_CAP_W 2
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#define ADI_2_REFSYS_HPOSCCTL0_SERIES_CAP_M 0x00000006
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#define ADI_2_REFSYS_HPOSCCTL0_SERIES_CAP_S 1
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// Field: [0] DIV3_BYPASS
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// HPOSC_2520MHZ Internal. Only to be used through TI provided API.
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// HPOSC_840MHZ Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL0_DIV3_BYPASS 0x00000001
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#define ADI_2_REFSYS_HPOSCCTL0_DIV3_BYPASS_M 0x00000001
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#define ADI_2_REFSYS_HPOSCCTL0_DIV3_BYPASS_S 0
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#define ADI_2_REFSYS_HPOSCCTL0_DIV3_BYPASS_HPOSC_2520MHZ 0x00000001
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#define ADI_2_REFSYS_HPOSCCTL0_DIV3_BYPASS_HPOSC_840MHZ 0x00000000
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//*****************************************************************************
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//
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// Register: ADI_2_REFSYS_O_HPOSCCTL1
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//
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//*****************************************************************************
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// Field: [5] BIAS_DIS
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL1_BIAS_DIS 0x00000020
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#define ADI_2_REFSYS_HPOSCCTL1_BIAS_DIS_M 0x00000020
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#define ADI_2_REFSYS_HPOSCCTL1_BIAS_DIS_S 5
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// Field: [4] PWRDET_EN
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL1_PWRDET_EN 0x00000010
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#define ADI_2_REFSYS_HPOSCCTL1_PWRDET_EN_M 0x00000010
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#define ADI_2_REFSYS_HPOSCCTL1_PWRDET_EN_S 4
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// Field: [3:0] BIAS_RES_SET
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL1_BIAS_RES_SET_W 4
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#define ADI_2_REFSYS_HPOSCCTL1_BIAS_RES_SET_M 0x0000000F
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#define ADI_2_REFSYS_HPOSCCTL1_BIAS_RES_SET_S 0
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//*****************************************************************************
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//
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// Register: ADI_2_REFSYS_O_HPOSCCTL2
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//
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//*****************************************************************************
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// Field: [7] BIAS_HOLD_MODE_EN
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL2_BIAS_HOLD_MODE_EN 0x00000080
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#define ADI_2_REFSYS_HPOSCCTL2_BIAS_HOLD_MODE_EN_M 0x00000080
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#define ADI_2_REFSYS_HPOSCCTL2_BIAS_HOLD_MODE_EN_S 7
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// Field: [6] TESTMUX_EN
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL2_TESTMUX_EN 0x00000040
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#define ADI_2_REFSYS_HPOSCCTL2_TESTMUX_EN_M 0x00000040
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#define ADI_2_REFSYS_HPOSCCTL2_TESTMUX_EN_S 6
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// Field: [5:4] ATEST_SEL
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL2_ATEST_SEL_W 2
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#define ADI_2_REFSYS_HPOSCCTL2_ATEST_SEL_M 0x00000030
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#define ADI_2_REFSYS_HPOSCCTL2_ATEST_SEL_S 4
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// Field: [3:0] CURRMIRR_RATIO
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_2_REFSYS_HPOSCCTL2_CURRMIRR_RATIO_W 4
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#define ADI_2_REFSYS_HPOSCCTL2_CURRMIRR_RATIO_M 0x0000000F
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#define ADI_2_REFSYS_HPOSCCTL2_CURRMIRR_RATIO_S 0
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#endif // __ADI_2_REFSYS__
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