Kaspar Schleiser 4eba1427d2 cpu/fe310: uart_init(): drain RX fifo before enabling RX IRQ		2020-01-07 13:16:02 +01:00
..
cpucycle.c	cpu/fe310: add RISC-V cpu FE310	2018-05-29 15:21:45 -07:00
cpuid.c	make: add hifive1 to BOARD_INSUFFICIENT_MEMORY	2018-05-29 16:27:53 -07:00
gpio.c	many typo fixes	2019-11-23 22:39:07 +01:00
Makefile	cpu/fe310: add RISC-V cpu FE310	2018-05-29 15:21:45 -07:00
pm.c	cpu/fe310: use WFI to wait for SW interrupt	2019-09-16 09:32:27 -07:00
rtc.c	cpu/fe310: add RISC-V cpu FE310	2018-05-29 15:21:45 -07:00
rtt.c	cpu/fe310: add RISC-V cpu FE310	2018-05-29 15:21:45 -07:00
timer.c	cpu/fe310: periph/timer: reset counter in timer_init()	2019-02-21 11:34:59 +01:00
uart.c	cpu/fe310: uart_init(): drain RX fifo before enabling RX IRQ	2020-01-07 13:16:02 +01:00