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https://github.com/RIOT-OS/RIOT.git
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151 lines
3.7 KiB
C
151 lines
3.7 KiB
C
/*
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* Copyright (C) 2015-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32f1
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include "periph_cpu_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Available number of ADC devices
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*/
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#define ADC_DEVS (2U)
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/**
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* @brief Overwrite the default gpio_t type definition
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* @{
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*/
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#define HAVE_GPIO_T
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typedef uint32_t gpio_t;
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/** @} */
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/**
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* @brief Definition of a fitting UNDEF value
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*/
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#define GPIO_UNDEF (0xffffffff)
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/**
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* @brief Define a CPU specific GPIO pin generator macro
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*/
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#define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y)
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/**
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* @brief All timers for the STM32F1 have 4 CC channels
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*/
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#define TIMER_CHANNELS (4U)
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/**
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* @brief All timers have a width of 16-bit
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*/
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#define TIMER_MAXVAL (0xffff)
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/**
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* @brief Override values for pull register configuration
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* @{
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*/
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#define HAVE_GPIO_PP_T
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typedef enum {
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GPIO_NOPULL = 4, /**< do not use internal pull resistors */
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GPIO_PULLUP = 9, /**< enable internal pull-up resistor */
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GPIO_PULLDOWN = 8 /**< enable internal pull-down resistor */
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} gpio_pp_t;
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/** @} */
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/**
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* @brief Override flank configuration values
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* @{
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*/
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#define HAVE_GPIO_FLANK_T
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typedef enum {
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GPIO_RISING = 1, /**< emit interrupt on rising flank */
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GPIO_FALLING = 2, /**< emit interrupt on falling flank */
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GPIO_BOTH = 3 /**< emit interrupt on both flanks */
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} gpio_flank_t;
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/** @} */
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/**
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* @brief Available ports on the STM32F1 family
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*/
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enum {
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PORT_A = 0, /**< port A */
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PORT_B = 1, /**< port B */
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PORT_C = 2, /**< port C */
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PORT_D = 3, /**< port D */
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PORT_E = 4, /**< port E */
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PORT_F = 5, /**< port F */
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PORT_G = 6, /**< port G */
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};
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/**
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* @brief Define alternate function modes
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*
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* On this CPU, only the output pins have alternate function modes. The input
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* pins have to be configured using the default gpio_init() function.
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*/
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typedef enum {
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GPIO_AF_OUT_PP = 0xb, /**< alternate function output - push-pull */
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GPIO_AF_OUT_OD = 0xf, /**< alternate function output - open-drain */
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} gpio_af_out_t;
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/**
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* @brief ADC channel configuration data
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*/
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typedef struct {
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gpio_t pin; /**< pin connected to the channel */
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uint8_t dev; /**< ADCx - 1 device used for the channel */
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uint8_t chan; /**< CPU ADC channel connected to the pin */
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} adc_conf_t;
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/**
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* @brief Timer configuration
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*/
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typedef struct {
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TIM_TypeDef *dev; /**< timer device */
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uint8_t bus; /**< APBx bus the timer is clock from */
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uint8_t rcc_bit; /**< corresponding bit in the RCC register */
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uint8_t irqn; /**< global IRQ channel */
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} timer_conf_t;
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/**
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* @brief Configure the alternate function for the given pin
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*
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* @note This is meant for internal use in STM32F1 peripheral drivers only
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*
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* @param[in] pin pin to configure
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* @param[in] af alternate function to use
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*/
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void gpio_init_af(gpio_t pin, gpio_af_out_t af);
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/**
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* @brief Configure the given pin to be used as ADC input
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*
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* @param[in] pin pin to configure
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*/
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void gpio_init_analog(gpio_t pin);
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H_ */
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/** @} */
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