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147 lines
3.3 KiB
C
147 lines
3.3 KiB
C
/*
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* Copyright (C) 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_msp430fxyz
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* @{
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*
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* @file
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* @brief Low-level timer driver implementation
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*
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* This implementation does only support one fixed timer, as defined in the
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* boards periph_conf.h file.
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*
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* @todo Generalize to handle more timers and make them configurable
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* through the board's `periph_conf.h`
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include "cpu.h"
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#include "periph_cpu.h"
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#include "periph_conf.h"
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#include "periph/timer.h"
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/**
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* @brief Save reference to the timer callback
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*/
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static void (*isr_cb)(int chan);
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int timer_init(tim_t dev, unsigned int us_per_tick, void (*callback)(int))
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{
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/* using fixed TIMER_BASE for now */
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if (dev != 0) {
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return -1;
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}
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/* TODO: configure time-base depending on us_per_tick value */
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if (us_per_tick != 1) {
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return -1;
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}
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/* reset the timer A configuration */
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TIMER_BASE->CTL = TIMER_CTL_CLR;
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/* save callback */
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isr_cb = callback;
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/* configure timer to use the SMCLK with prescaler of 8 */
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TIMER_BASE->CTL = (TIMER_CTL_TASSEL_SMCLK | TIMER_CTL_ID_DIV8);
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/* configure CC channels */
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for (int i = 0; i < TIMER_CHAN; i++) {
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TIMER_BASE->CCTL[i] = 0;
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}
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/* start the timer in continuous mode */
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TIMER_BASE->CTL |= TIMER_CTL_MC_CONT;
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return 0;
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}
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int timer_set(tim_t dev, int channel, unsigned int timeout)
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{
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uint16_t target = TIMER_BASE->R + (uint16_t)timeout;
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return timer_set_absolute(dev, channel, (unsigned int)target);
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}
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int timer_set_absolute(tim_t dev, int channel, unsigned int value)
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{
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if (dev != 0 || channel > TIMER_CHAN) {
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return -1;
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}
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TIMER_BASE->CCR[channel] = value;
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TIMER_BASE->CCTL[channel] &= ~(TIMER_CCTL_CCIFG);
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TIMER_BASE->CCTL[channel] |= (TIMER_CCTL_CCIE);
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return 0;
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}
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int timer_clear(tim_t dev, int channel)
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{
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if (dev != 0 || channel > TIMER_CHAN) {
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return -1;
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}
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TIMER_BASE->CCTL[channel] &= ~(TIMER_CCTL_CCIE);
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return 0;
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}
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unsigned int timer_read(tim_t dev)
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{
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return (unsigned int)TIMER_BASE->R;
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}
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void timer_start(tim_t dev)
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{
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TIMER_BASE->CTL |= TIMER_CTL_MC_CONT;
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}
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void timer_stop(tim_t dev)
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{
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TIMER_BASE->CTL &= ~(TIMER_CTL_MC_MASK);
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}
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void timer_irq_enable(tim_t dev)
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{
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/* TODO: not supported, yet
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*
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* Problem here: there is no means, of globally disabling timer interrupts.
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* We could just enable the interrupts for all CC channels, but this would
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* mean, that we might enable interrupts for channels, that are not active.
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* I guess we need to remember the interrupt state of all channels before
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* disabling and then restore this state when enabling again?! */
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}
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void timer_irq_disable(tim_t dev)
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{
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/* TODO: not supported, yet */
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}
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void timer_reset(tim_t dev)
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{
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TIMER_BASE->R = 0;
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}
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ISR(TIMER_ISR_CC0, isr_timer_a_cc0)
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{
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__enter_isr();
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TIMER_BASE->CCTL[0] &= ~(TIMER_CCTL_CCIE);
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isr_cb(0);
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__exit_isr();
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}
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ISR(TIMER_ISR_CCX, isr_timer_a_ccx)
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{
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__enter_isr();
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int chan = (int)(TIMER_IVEC->TAIV >> 1);
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TIMER_BASE->CCTL[chan] &= ~(TIMER_CCTL_CCIE);
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isr_cb(chan);
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__exit_isr();
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}
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