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114 lines
3.6 KiB
C
114 lines
3.6 KiB
C
/*
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* Copyright (C) 2015 PHYTEC Messtechnik GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @defgroup cpu_kinetis_common_hwtimer Kinetis hwtimer
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* @ingroup cpu_kinetis_common
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* @brief Driver uses Freescale Low Power Timer lptmr0.
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* There are four clock sources available:
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*
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* LPTIMER_CLKSRC_MCGIRCLK - slow or fast internal reference clock
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* LPTIMER_CLKSRC_LPO - PMC 1kHz output
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* LPTIMER_CLKSRC_ERCLK32K - OSC32KCLK or the RTC clock
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* LPTIMER_CLKSRC_OSCERCLK - system oscillator output
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*
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* Tested clock sources:
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*
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* LPO - 1kHz
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* RTC - 32768Hz
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*
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* Possibly, additional settings in System Integration Module are necessary.
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* Please consult the Reference Manual of your MCU for proper clock settings.
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*
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* ### LPTMR Configuration Example (for cpu_conf.h) ###
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*
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* #define LPTIMER_CLKSRC LPTIMER_CLKSRC_LPO
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* #define LPTIMER_CLKEN() (SIM->SCGC5 |= SIM_SCGC5_LPTMR_MASK)
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* #define LPTIMER_CLKDIS() (SIM->SCGC5 &= ~SIM_SCGC5_PTMR_MASK)
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* #define LPTIMER_CNR_NEEDS_LATCHING 1
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*
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* Optional settings:
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*
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* #define LPTIMER_DEV LPTMR0
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* #define LPTIMER_IRQ_PRIO 1
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* #define LPTIMER_IRQ_CHAN LPTMR0_IRQn
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* @{
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* @file
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* @brief Interface definition for the Kinetis hwtimer driver.
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*
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* @author Johann Fischer <j.fischer@phytec.de>
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*/
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#ifndef __HWTIMER_CPU_H
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#define __HWTIMER_CPU_H
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#include "cpu_conf.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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* @name Clock settings for the lptmr timer
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*/
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#define LPTIMER_CLKSRC_MCGIRCLK 0 /**< internal reference clock (4MHz) */
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#define LPTIMER_CLKSRC_LPO 1 /**< PMC 1kHz output */
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#define LPTIMER_CLKSRC_ERCLK32K 2 /**< RTC clock 32768Hz */
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#define LPTIMER_CLKSRC_OSCERCLK 3 /**< system oscillator output, clock from RF-Part */
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#ifndef LPTIMER_CLKSRC
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#define LPTIMER_CLKSRC LPTIMER_CLKSRC_LPO /**< default clock source */
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#endif
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#if (LPTIMER_CLKSRC == LPTIMER_CLKSRC_MCGIRCLK)
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#define LPTIMER_CLK_PRESCALE 1
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#define LPTIMER_SPEED 1000000
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#elif (LPTIMER_CLKSRC == LPTIMER_CLKSRC_OSCERCLK)
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#define LPTIMER_CLK_PRESCALE 1
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#define LPTIMER_SPEED 1000000
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#elif (LPTIMER_CLKSRC == LPTIMER_CLKSRC_ERCLK32K)
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#define LPTIMER_CLK_PRESCALE 0
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#define LPTIMER_SPEED 32768
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#else
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#define LPTIMER_CLK_PRESCALE 0
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#define LPTIMER_SPEED 1000
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#endif
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#ifndef LPTIMER_DEV
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/** default Low Power Timer device */
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#define LPTIMER_DEV LPTMR0
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#endif
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#ifndef LPTIMER_IRQ_PRIO
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/** IRQ priority for hwtimer interrupts */
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#define LPTIMER_IRQ_PRIO 1
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#endif
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#ifndef LPTIMER_IRQ_CHAN
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/** IRQ channel for hwtimer interrupts */
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#define LPTIMER_IRQ_CHAN LPTMR0_IRQn
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#endif
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/**
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* @name Hardware timer configuration
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* @{
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*/
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#define HWTIMER_MAXTIMERS 1 /**< the CPU implementation supports 1 HW timer */
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#define HWTIMER_MAXTICKS (0xFFFFFFFF) /**< simulating 32-bit timer behavior */
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#define HWTIMER_SPEED LPTIMER_SPEED /**< speed depends on clock source and prescale */
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HWTIMER_CPU_H */
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/** @} */
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