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57 lines
1.3 KiB
C
57 lines
1.3 KiB
C
/*
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* Copyright (C) 2022 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp32
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* @{
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*
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* @file
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* @brief Default SDK configuration for all ESP32x SoC bootloaders
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef SDKCONFIG_DEFAULT_COMMON_H
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#define SDKCONFIG_DEFAULT_COMMON_H
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#ifndef DOXYGEN
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
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#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
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#define CONFIG_BOOTLOADER_WDT_ENABLE 1
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#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
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#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x0
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#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
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#define CONFIG_ESP_CONSOLE_UART 1
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#define CONFIG_ESP_CONSOLE_UART_DEFAULT 1
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#define CONFIG_ESP_CONSOLE_UART_NUM 0
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#define CONFIG_CONSOLE_UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
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#define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
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#define CONFIG_LOG_DEFAULT_LEVEL 3
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#define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
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#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
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#define CONFIG_PARTITION_TABLE_MD5 1
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#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
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#ifdef __cplusplus
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}
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#endif
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#endif /* DOXYGEN */
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#endif /* SDKCONFIG_DEFAULT_COMMON_H */
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/** @} */
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